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Related papers: Ethernet Packet Processor for SoC Application

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Modern System-on-Chip (SoC) platforms typically consist of multiple processors and a communication interconnect between them. Network-on-Chip (NoC) arises as a solution to interconnect these systems, which provides a scalable, reusable, and…

Hardware Architecture · Computer Science 2016-10-05 Marcelo Daniel Berejuck

The fast pace at which new online services emerge leads to a rapid surge in the volume of network traffic. A recent approach that the research community has proposed to tackle this issue is in-network computing, which means that network…

Networking and Internet Architecture · Computer Science 2024-11-11 Klajd Zyla , Marco Liess , Thomas Wild , Andreas Herkersdorf

Network switches and routers need to serve packet writes and reads at rates that challenge the most advanced memory technologies. As a result, scaling the switching rates is commonly done by parallelizing the packet I/Os using multiple…

Networking and Internet Architecture · Computer Science 2016-05-17 Rami Cohen , Yuval Cassuto

Modern mobile and stationary devices are equipped with multiple network interfaces aiming to provide wireless and wireline connectivity either in a local LAN or the Internet. Multipath TCP (MPTCP) protocol has been developed on top of…

Networking and Internet Architecture · Computer Science 2025-11-19 Dimitrios Dimopoulos , Apostolis K. Salkintzis , Dimitris Tsolkas , Nikos Passas , Lazaros Merakos

The increase in computation and storage has led to a significant growth in the scale of systems powering applications and services, raising concerns about sustainability and operational costs. In this paper, we explore power-saving…

Networking and Internet Architecture · Computer Science 2026-04-22 Miguel Sánchez de la Rosa , Francisco J. andújar , Jesus Escudero-Sahuquillo , José L. Sánchez , Francisco J. Alfaro-Cortés

The MultiNoC system implements a programmable on-chip multiprocessing platform built on top of an efficient, low area overhead intra-chip interconnection scheme. The employed interconnection structure is a Network on Chip, or NoC. NoCs are…

Hardware Architecture · Computer Science 2011-11-09 Aline Mello , Leandro Moller , Ney Calazans , Fernando Moraes

Modern switches have packet processing capacity of up to multi-tera bits per second, and they are also becoming more and more programmable. We seek to understand whether the programmability can translate packet processing capacity to…

Networking and Internet Architecture · Computer Science 2018-03-06 Li Chen , Ge Chen , Justinas Lingys , Kai Chen

This paper presents a system consisting of the FPGA IP core, the simple network protocol and the Linux device driver, capable of efficient and reliable data transmission from a low resources FPGA chip to the Linux-based embedded computer…

Networking and Internet Architecture · Computer Science 2012-10-02 Wojciech M. Zabolotny

Service providers employ different transport technologies like PDH, SDH/SONET, OTN, DWDM, Ethernet, MPLS-TP etc. to support different types of traffic and service requirements. Dynamic service provisioning requires the use of on-line…

Networking and Internet Architecture · Computer Science 2019-01-08 Madanagopal Ramachandran , Krishna M. Sivalingam

The Internet of Things (IoT) refers to a pervasive presence of interconnected and uniquely identifiable physical devices. These devices' goal is to gather data and drive actions in order to improve productivity, and ultimately reduce or…

Other Computer Science · Computer Science 2018-02-22 Tosiron Adegbija , Anita Rogacs , Chandrakant Patel , Ann Gordon-Ross

As the number of WiFi devices and their traffic demands continue to rise, the need for a scalable and high-performance wireless infrastructure becomes increasingly essential. Central to this infrastructure are WiFi Access Points (APs),…

Networking and Internet Architecture · Computer Science 2024-10-23 Shiqi Zhang , Mridul Gupta , Behnam Dezfouli

This paper aims to apply two major scaling transformations from the computing packaging industry to internet routers: the heterogeneous integration of high-bandwidth memories (HBMs) and chiplets, as well as in-package optics. We propose a…

Networking and Internet Architecture · Computer Science 2026-02-12 Isaac Keslassy , Ilay Yavlovich , Jose Yallouz , Tzu-Chien Hsueh , Yeshaiahu Fainman , Bill Lin

We present a novel architecture for sparse pattern processing, using flash storage with embedded accelerators. Sparse pattern processing on large data sets is the essence of applications such as document search, natural language processing,…

Hardware Architecture · Computer Science 2017-01-25 Sang-Woo Jun , Huy T. Nguyen , Vijay N. Gadepally , Arvind

Intel Ethernet Flow Director is an advanced network interface card (NIC) technology. It provides the benefits of parallel receive processing in multiprocessing environments and can automatically steer incoming network data to the same core…

Networking and Internet Architecture · Computer Science 2011-06-06 Wenji Wu , Phil DeMar , Matt Crawford

Synaptic delay has attracted significant attention in neural network dynamics for integrating and processing complex spatiotemporal information. This paper introduces a high-throughput Spiking Neural Network (SNN) processor that supports…

Neural and Evolutionary Computing · Computer Science 2025-11-07 Faquan Chen , Qingyang Tian , Ziren Wu , Rendong Ying , Fei Wen , Peilin Liu

Graph is a well known data structure to represent the associated relationships in a variety of applications, e.g., data science and machine learning. Despite a wealth of existing efforts on developing graph processing systems for improving…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-02-28 Chuangyi Gui , Long Zheng , Bingsheng He , Cheng Liu , Xinyu Chen , Xiaofei Liao , Hai Jin

In this paper, we research the feasibility of adapting the packet coalescing algorithm, used successfully in IEEE 802.3az Ethernet cards, to upstream EPON channels. Our simulation experiments show that, using this algorithm, great power…

Networking and Internet Architecture · Computer Science 2015-07-28 Miguel Rodríguez-Pérez , Sergio Herrería-Alonso , Manuel Fernández-Veiga , Cándido López-García

The recent advance of edge computing technology enables significant sensing performance improvement of Internet of Things (IoT) networks. In particular, an edge server (ES) is responsible for gathering sensing data from distributed sensing…

Signal Processing · Electrical Eng. & Systems 2025-04-17 Huawei Hou , Suzhi Bi , Xian Li , Shuoyao Wang , Liping Qian , Zhi Quan

According to the increasing complexity of network application and internet traffic, network processor as a subset of embedded processors have to process more computation intensive tasks. By scaling down the feature size and emersion of chip…

Hardware Architecture · Computer Science 2012-04-13 Mehdi Alipour , Hojjat Taghdisi

High Performance Computing (HPC) aims at providing reasonably fast computing solutions to scientific and real life problems. The advent of multicore architectures is noticeable in the HPC history, because it has brought the underlying…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-10-07 Claude Tadonki