Related papers: Low resource FPGA-based Time to Digital Converter
The upgrade of the ATLAS muon spectrometer for high-luminosity LHC requires new trigger and readout electronics for the various elements of the detector. We present the design of a time-to-digital converter (TDC) ASIC prototype for the…
We present some aspects of photon counting to study scintillators at low temperatures. A time-to-digital converter (TDC) had been configured to acquire several-minute-long streams of data, simplifying the multiple photon counting…
HPgTPCs have benefits such as low energy threshold, magnetisability, and 4$\pi$ acceptance, making them ideal for neutrino experiments such as DUNE. We present the design of an FPGA-based solution optimised for ND-GAr, which is part of the…
Field Programmable Gate Array (FPGA) is widely used in acceleration of deep learning applications because of its reconfigurability, flexibility, and fast time-to-market. However, conventional FPGA suffers from the tradeoff between chip area…
Inspired by Wilkinson ADC method, we implement a fast linear discharge method based on FPGA to digitize nuclear pulse signal. In this scheme, we use a constant current source to discharge the charge on capacitor which is integrated by the…
We introduce the waveform capture device (WCD), a flexible measurement system capable of recording complex digital signals on trillionth-of-a-second (ps) time scales. The WCD is implemented via modular code on an off-the-shelf…
The prototype of a TDC board has been developed for the new high granular time-of-flight neutron detector (HGND). The board is based on the standard LVDS 4x asynchronous oversampling using the xc7k160 FPGA with a 100 ps bin width. The HGND…
Cutting edge FPGAs are not energy efficient as conventionally presumed to be, and therefore, aggressive power-saving techniques have become imperative. The clock rate of an FPGA-mapped design is set based on worst-case conditions to ensure…
High sampling speed can be achieved using multiple Analog-to-Digital Converters (ADCs) based on the Time-Interleaving A/D Conversion (TIADC) technique. Various types of methods were proposed to correct the mismatch errors among parallel ADC…
A 3.8ps root mean square (RMS) time synchronization implemented in a 20nm fabrication process ultrascale kintex Field Programmable Gate Array (FPGA) is presented. The multichannel high-speed serial transceivers (e.g. GTH) play a key role in…
This paper describes two research projects that develop new low-cost techniques for testing devices with multiple high-speed (2 to 5 Gbps) signals. Each project uses commercially available components to keep costs low, yet achieves…
A characterisation of the Timepix4 pixel front-end with a strong focus on timing performance is presented. Externally generated test pulses were used to probe the per-pixel time-to-digital converter (TDC) and measure the time-bin sizes by…
In the context of embedded systems design, two important challenges are still under investigation. First, improve real-time data processing, reconfigurability, scalability, and self-adjusting capabilities of hardware components. Second,…
The usage of linear transformations has great relevance for data decorrelation applications, like image and video compression. In that sense, the discrete Tchebichef transform (DTT) possesses useful coding and decorrelation properties. The…
Modern physics experiments rely on precise timing provided by programmable digital pulse generators. In many experimental control systems, this role is filled by custom devices built on Field Programmable Gate Arrays (FPGAs). While highly…
A field programmable gate array (FPGA) based timing and trigger control system has been developed for the Dynamic Compression Sector (DCS) user facility located at the Advanced Photon Source (APS) at Argonne National Laboratory. The DCS is…
We have developed a completely new type of general-purpose CCD data acquisition system which enables one to drive any type of CCD using any type of clocking mode. A CCD driver system widely used before consisted of an analog multiplexer…
In recent years, Compute-in-memory (CiM) architectures have emerged as a promising solution for deep neural network (NN) accelerators. Multiply-accumulate~(MAC) is considered a {\textit de facto} unit operation in NNs. By leveraging the…
Timing and power consumption play an important role in the design of embedded systems. Furthermore, both properties are directly related to the safety requirements of many embedded systems. With regard to availability requirements, power…
We present a readout chip prototype for future pixel detectors with timing capabilities. The prototype is intended for characterizing 4D pixel arrays with a pixel size of $100\times100~\mu \text{m}^2$, where the sensors are Low Gain…