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The paper presents a methodology for temporal logic verification of continuous-time switched stochastic systems. Our goal is to find the lower bound on the probability that a complex temporal property is satisfied over a finite time…

Logic in Computer Science · Computer Science 2021-09-28 Mahathi Anand , Pushpak Jagtap , Majid Zamani

The paper is focused on temporal logics for the description of the behaviour of real-time pushdown reactive systems. The paper is motivated to bridge tractable logics specialized for expressing separately dense-time real-time properties and…

Logic in Computer Science · Computer Science 2018-08-16 Laura Bozzelli , Aniello Murano , Adriano Peron

We consider temporal logic verification of (possibly nonlinear) dynamical systems evolving over continuous state spaces. Our approach combines automata-based verification and the use of so-called barrier certificates. Automata-based…

Formal Languages and Automata Theory · Computer Science 2014-03-17 Tichakorn Wongpiromsarn , Ufuk Topcu , Andrew Lamperski

Logics and model-checking have been successfully used in the last decades for modeling and verification of various types of hardware (and software) systems. While most languages and techniques emerged in a context of monolithic systems with…

Software Engineering · Computer Science 2016-07-14 Manuel Mazzara

Metric Temporal Logic (MTL) and Timed Propositional Temporal Logic (TPTL) extend Linear Temporal Logic (LTL) for real-time constraints, with MTL using time-bounded modalities and TPTL employing freeze quantifiers. Satisfiability for both is…

Logic in Computer Science · Computer Science 2024-11-04 Shankara Narayanan Krishna , Khushraj Madnani , Agnipratim Nag , Paritosh Pandya

We revisit a fundamental result in real-time verification, namely that the binary reachability relation between configurations of a given timed automaton is definable in linear arithmetic over the integers and reals. In this paper we give a…

Logic in Computer Science · Computer Science 2017-04-20 Karin Quaas , Mahsa Shirmohammadi , James Worrell

The satisfiability problem for branching-time temporal logics like CTL*, CTL and CTL+ has important applications in program specification and verification. Their computational complexities are known: CTL* and CTL+ are complete for doubly…

Logic in Computer Science · Computer Science 2015-07-01 Oliver Friedmann , Martin Lange , Markus Latte

This paper revisits the classical notion of sampling in the setting of real-time temporal logics for the modeling and analysis of systems. The relationship between the satisfiability of Metric Temporal Logic (MTL) formulas over…

Logic in Computer Science · Computer Science 2015-03-13 Carlo A. Furia , Matteo Rossi

A challenging problem for autonomous systems is to synthesize a reactive controller that conforms to a set of given correctness properties. Linear temporal logic (LTL) provides a formal language to specify the desired behavioral properties…

Formal Languages and Automata Theory · Computer Science 2019-10-08 Rayna Dimitrova , Mahsa Ghasemi , Ufuk Topcu

We study preprocessing techniques for clause normal forms of LTL formulas. Applying the mechanism of labelled clauses enables us to reinterpret LTL satisfiability as a set of purely propositional problems and thus to transfer simplification…

Logic in Computer Science · Computer Science 2013-10-01 Martin Suda

This work studies the planning problem for robotic systems under both quantifiable and unquantifiable uncertainty. The objective is to enable the robotic systems to optimally fulfill high-level tasks specified by Linear Temporal Logic (LTL)…

Robotics · Computer Science 2025-02-28 Pian Yu , Yong Li , David Parker , Marta Kwiatkowska

Runtime verification encompasses several lightweight techniques for checking whether a system's current execution satisfies a given specification. We focus on runtime verification for Linear Temporal Logic (LTL). Previous work describes…

Logic in Computer Science · Computer Science 2025-08-12 Javier Esparza , Vincent Fischer

This paper describes a technique for inferring temporal-logic properties for sets of finite data streams. Such data streams arise in many domains, including server logs, program testing, and financial and marketing data; temporal-logic…

Logic in Computer Science · Computer Science 2020-06-09 Samuel Huang , Rance Cleaveland

Virtually all verification and synthesis techniques assume that the formal specifications are readily available, functionally correct, and fully match the engineer's understanding of the given system. However, this assumption is often…

Formal Languages and Automata Theory · Computer Science 2022-06-15 Simon Lutz , Daniel Neider , Rajarshi Roy

We propose a reachability-based framework for reliable LLM-guided human-autonomy teaming (HAT) using signal temporal logic (STL). In the proposed framework, LLM is leveraged as a translator that transfers natural language commands given by…

Systems and Control · Electrical Eng. & Systems 2026-03-10 Joonwon Choi , Kartik Anand Pant , Karthik Nune , Inseok Hwang

A framework is presented for the verification of Signal Temporal Logic (STL) specifications over continuous-time nonlinear systems under uncertainty. Based on reachability analysis, the proposed method addresses indeterminate satisfaction…

Logic in Computer Science · Computer Science 2025-11-25 Antoine Besset , Joris Tillet , Julien Alexandre dit Sandretto

In the article \The State of SAT", the authors asked whether a procedure dramatically different from DPLL can be found for handling unsatisfiable instances. This study proposes a new linear programming approach to address this issue…

Computational Complexity · Computer Science 2018-08-20 Chengling Fang , Jiang Liu

Linear Temporal Logic (LTL) is a widely used task specification language for autonomous systems. To mitigate the significant manual effort and expertise required to define LTL-encoded tasks, several methods have been proposed for…

Computation and Language · Computer Science 2026-02-23 David Smith Sundarsingh , Jun Wang , Jyotirmoy V. Deshmukh , Yiannis Kantaros

HyperLTL, the extension of Linear Temporal Logic by trace quantifiers, is a uniform framework for expressing information flow policies by relating multiple traces of a security-critical system. HyperLTL has been successfully applied to…

Logic in Computer Science · Computer Science 2019-12-17 Corto Mascle , Martin Zimmermann

Virtually all verification techniques using formal methods rely on the availability of a formal specification, which describes the design requirements precisely. However, formulating specifications remains a manual task that is notoriously…

Formal Languages and Automata Theory · Computer Science 2025-01-28 Daniel Neider , Rajarshi Roy