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Machine Learning (ML) models execute several parallel computations including Generalized Matrix Multiplication, Convolution, Dropout, etc. These computations are commonly executed on Graphics Processing Units (GPUs), by dividing the…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-02-15 Abhinav Jangda , Saeed Maleki , Maryam Mehri Dehnavi , Madan Musuvathi , Olli Saarikivi

Graph embedding techniques have attracted growing interest since they convert the graph data into continuous and low-dimensional space. Effective graph analytic provides users a deeper understanding of what is behind the data and thus can…

Machine Learning · Computer Science 2022-01-21 Azita Nouri , Philip E. Davis , Pradeep Subedi , Manish Parashar

High-level synthesis (HLS) has enabled the rapid development of custom hardware circuits for many software applications. However, developing high-performance hardware circuits using HLS is still a non-trivial task requiring expertise in…

Hardware Architecture · Computer Science 2025-01-17 Suhail Basalama , Jason Cong

A processor's memory hierarchy has a major impact on the performance of running code. However, computing platforms, where the actual hardware characteristics are hidden from both the end user and the tools that mediate execution, such as a…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-07-10 Keith Cooper , Xiaoran Xu

Directory-based protocols have been the de facto solution for maintaining cache coherence in shared-memory parallel systems comprising multi/many cores, where each store instruction is eagerly made globally visible by invalidating the…

Hardware Architecture · Computer Science 2012-10-09 Daofu Liu , Yunji Chen , Qi Guo , Tianshi Chen , Ling Li , Qunfeng Dong , Weiwu Hu

Data-parallel applications, such as data analytics, machine learning, and scientific computing, are placing an ever-growing demand on floating-point operations per second on emerging systems. With increasing integration density, the quest…

Hardware Architecture · Computer Science 2020-10-09 Florian Zaruba , Fabian Schuiki , Torsten Hoefler , Luca Benini

Sequential computation is well understood but does not scale well with current technology. Within the next decade, systems will contain large numbers of processors with potentially thousands of processors per chip. Despite this, many…

Hardware Architecture · Computer Science 2015-11-17 James Hanlon

This book focuses on the use of algorithmic high-level synthesis (HLS) to build application-specific FPGA systems. Our goal is to give the reader an appreciation of the process of creating an optimized hardware design using HLS. Although…

Hardware Architecture · Computer Science 2018-05-11 Ryan Kastner , Janarbek Matai , Stephen Neuendorffer

Over the past few years, there has been an increased interest in including FPGAs in data centers and high-performance computing clusters along with GPUs and other accelerators. As a result, it has become increasingly important to have a…

Distributed, Parallel, and Cluster Computing · Computer Science 2022-09-14 Mostafa Eghbali Zarch , Reece Neff , Michela Becchi

Multimodal transformers integrate diverse data types like images, audio, and text, advancing tasks such as audio-visual understanding and image-text retrieval; yet their high parameterization limits deployment on resource-constrained edge…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-07-10 Timo Fudala , Vasileios Tsouvalas , Nirvana Meratnia

The last few years have seen the emergence of IoT processors: ultra-low power systems-on-chips (SoCs) combining lightweight and flexible micro-controller units (MCUs), often based on open-ISA RISC-V cores, with application-specific…

Systems and Control · Electrical Eng. & Systems 2022-01-21 Nazareno Bruschi , Germain Haugou , Giuseppe Tagliavini , Francesco Conti , Luca Benini , Davide Rossi

Today the LHC offline computing relies heavily on CPU resources, despite the interest in compute accelerators, such as GPUs, for the longer term future. The number of cores per CPU socket has continued to increase steadily, reaching the…

High Energy Physics - Experiment · Physics 2023-10-05 Christopher Jones , Patrick Gartung

Efficient parallelism is necessary for achieving low-latency, high-throughput inference with large language models (LLMs). Tensor parallelism (TP) is the state-of-the-art method for reducing LLM response latency, however GPU communications…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-01-27 Mert Hidayetoglu , Aurick Qiao , Michael Wyatt , Jeff Rasley , Yuxiong He , Samyam Rajbhandari

For years, the open-source RISC-V instruction set has been driving innovation in processor design, spanning from high-end cores to low-cost or low-power cores. After a decade of evolution, RISC architectures are now as mature as the CISC…

Hardware Architecture · Computer Science 2024-06-24 Juliette Pottier , Thomas Nieddu , Bertrand Le Gal , Sébastien Pillement , Maria Méndez Real

GPUs are widely used to accelerate many important classes of workloads today. However, we observe that several important emerging classes of workloads, including simulation engines for deep reinforcement learning and dynamic neural…

Hardware Architecture · Computer Science 2024-01-24 Sankeerth Durvasula , Adrian Zhao , Raymond Kiguru , Yushi Guan , Zhonghan Chen , Nandita Vijaykumar

The well known method C-Slow Retiming (CSR) can be used to automatically convert a given CPU into a multithreaded CPU with independent threads. These CPUs are then called streaming or barrel processors. System Hyper Pipelining (SHP) adds a…

Hardware Architecture · Computer Science 2015-08-31 Tobias Strauch

The demise of Moore's Law and Dennard Scaling has revived interest in specialized computer architectures and accelerators. Verification and testing of this hardware depend heavily upon cycle-accurate simulation of register-transfer-level…

Hardware Architecture · Computer Science 2024-02-09 Mahyar Emami , Sahand Kashani , Keisuke Kamahori , Mohammad Sepehr Pourghannad , Ritik Raj , James R. Larus

Split learning (SL) is a collaborative learning framework, which can train an artificial intelligence (AI) model between a device and an edge server by splitting the AI model into a device-side model and a server-side model at a cut layer.…

Networking and Internet Architecture · Computer Science 2023-01-03 Wen Wu , Mushu Li , Kaige Qu , Conghao Zhou , Xuemin , Shen , Weihua Zhuang , Xu Li , Weisen Shi

Processing data received as a stream is a task commonly performed by modern embedded devices, in a wide range of applications such as multimedia (encoding/decoding/ playing media), networking (switching and routing), digital security,…

Hardware Architecture · Computer Science 2014-03-31 I. B. Nawinne , M. S. Wickramasinghe , R. G. Ragel , S. Radhakrishnan

In this paper, we present a parallel computing method for the coupled-cluster singles and doubles (CCSD) in periodic systems. The CCSD in periodic systems solves simultaneous equations for single-excitation and double-excitation amplitudes.…

Strongly Correlated Electrons · Physics 2019-11-04 Takumi Yamashita , Taichi Kosugi , Yu-ichiro Matsushita , Tetsuya Sakurai