Related papers: Development of Lattice QCD Tool Kit on Cell Broadb…
In this work we explore the performance of CUDA in quenched lattice SU(2) simulations. CUDA, NVIDIA Compute Unified Device Architecture, is a hardware and software architecture developed by NVIDIA for computing on the GPU. We present an…
Quantum computers (QCs) have the potential to solve critical problems significantly faster than today's most advanced supercomputers. One major challenge in realizing this technology is designing robust electrostatic pulses to realize…
A computational system for lattice QCD with exact chiral symmetry is described. The platform is a home-made Linux PC cluster, built with off-the-shelf components. At present this system constitutes of 64 nodes, with each node consisting of…
The exponentially growing model size drives the continued success of deep learning, but it brings prohibitive computation and memory cost. From the algorithm perspective, model sparsification and quantization have been studied to alleviate…
Given a quantum gate circuit, how does one execute it in a fault-tolerant architecture with as little overhead as possible? In this paper, we discuss strategies for surface-code quantum computing on small, intermediate and large scales.…
We present the results of a precision computation of B_K with Wilson fermions. Simulations are performed at different lattice spacings, enabling continuum limit extrapolations. Two different twisted mass QCD (tmQCD) regularisations are…
We develop an automated framework for proving lower bounds on the bilinear complexity of matrix multiplication over finite fields. Our approach systematically combines orbit classification of the restricted first matrix and dynamic…
Low-bit quantized neural networks are of great interest in practical applications because they significantly reduce the consumption of both memory and computational resources. Binary neural networks are memory and computationally efficient…
An overview is given of the QCDOC architecture, a massively parallel and highly scalable computer optimized for lattice QCD using system-on-a-chip technology. The heart of a single node is the PowerPC-based QCDOC ASIC, developed in…
The fast proliferation of extreme-edge applications using Deep Learning (DL) based algorithms required dedicated hardware to satisfy extreme-edge applications' latency, throughput, and precision requirements. While inference is achievable…
Modern graphics hardware is designed for highly parallel numerical tasks and promises significant cost and performance benefits for many scientific applications. One such application is lattice quantum chromodyamics (lattice QCD), where the…
We calculate---for the first time in three-flavor lattice QCD---the hadronic matrix elements of all five local operators that contribute to neutral $B^0$- and $B_s$-meson mixing in and beyond the Standard Model. We present a complete error…
We study the feasibility of a PC-based parallel computer for medium to large scale lattice QCD simulations. The E\"otv\"os Univ., Inst. Theor. Phys. cluster consists of 137 Intel P4-1.7GHz nodes with 512 MB RDRAM. The 32-bit, single…
Latency and efficiency issues are often overlooked when evaluating IR models based on Pretrained Language Models (PLMs) in reason of multiple hardware and software testing scenarios. Nevertheless, efficiency is an important part of such…
We present a 625 MHz clocked coherent one-way quantum key distribution (QKD) system which continuously distributes secret keys over an optical fibre link. To support high secret key rates, we implemented a fast hardware key distillation…
Sparse data structures are commonly used in neural networks to reduce the memory footprint. These data structures are compact but cause irregularities such as random memory accesses, which prevent efficient use of the memory hierarchy. GPUs…
We calculate, in the continuum limit of quenched lattice QCD, the form factor that enters in the decay rate of the semileptonic decay B --> D l nu. Making use of the step scaling method (SSM), previously introduced to handle two scale…
In the near-future noisy intermediate-scale quantum (NISQ) era of quantum computing technology, applications of quantum computing will be limited to calculations of very modest scales in terms of the number of qubits used. The need to…
Modern Neural Network (NN) architectures heavily rely on vast numbers of multiply-accumulate arithmetic operations, constituting the predominant computational cost. Therefore, this paper proposes a high-throughput, scalable and energy…
Recent experimental progress in realizing surface code on hardware, including demonstrations of break-even logical memory on devices with up to hundreds of physical qubits, has materially advanced the prospects for fault-tolerant quantum…