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3-D cross point phase change memory (PCM) is a promising emerging memory. However, dynamic performances of 3-D cross point PCM are limited and the role of bias scheme is unknown. Previous studies on bias schemes for planar memories use…

Emerging Technologies · Computer Science 2019-06-06 Yu Lei , Meng Liu , Houpeng Chen , Xi Li , Qian Wang , Zhitang Song

Point-to-multipoint communications are expected to play a pivotal role in next-generation networks. This paper refers to a cellular system transmitting layered multicast services to a multicast group of users. Reliability of communications…

Information Theory · Computer Science 2016-11-17 Andrea Tassi , Ioannis Chatzigeorgiou , Daniel E. Lucani

The rapid adoption of large language models (LLMs) is pushing AI accelerators toward increasingly powerful and specialized designs. Instead of further complicating software development with deeply hierarchical scratchpad memories (SPMs) and…

Hardware Architecture · Computer Science 2025-12-09 Zhongchun Zhou , Chengtao Lai , Yuhang Gu , Wei Zhang

This paper presents a novel achievable scheme for coded caching systems with $N$ files and $K$ users, specifically when $N \leq K$. This new scheme employs linear coding both during the placement phase - where cache contents are linear…

Information Theory · Computer Science 2024-06-11 Yinbin Ma , Daniela Tuninetti

When multiple processor cores (CPUs) and a GPU integrated together on the same chip share the off-chip DRAM, requests from the GPU can heavily interfere with requests from the CPUs, leading to low system performance and starvation of cores.…

Hardware Architecture · Computer Science 2018-05-01 Rachata Ausavarungnirun , Gabriel H. Loh , Lavanya Subramanian , Kevin Chang , Onur Mutlu

Erasure codes have been widely considered a promising solution to enhance data reliability at low storage costs. However, in modern geo-distributed storage systems, erasure codes may incur high data access latency as they require data…

Information Theory · Computer Science 2020-12-08 Kaiyang Liu , Jun Peng , Jingrong Wang , Jianping Pan

While reduction in feature size makes computation cheaper in terms of latency, area, and power consumption, performance of emerging data-intensive applications is determined by data movement. These trends have introduced the concept of…

Hardware Architecture · Computer Science 2018-03-19 Bahar Asgari , Saibal Mukhopadhyay , Sudhakar Yalamanchili

High-capacity NAND flash memories use multi-level cells (MLCs) to store multiple bits per cell and achieve high storage densities. Higher densities cause increased raw bit error rates (BERs), which demand powerful error correcting codes.…

Information Theory · Computer Science 2012-02-08 Jiadong Wang , Guiqiang Dong , Tong Zhang , Richard Wesel

Flash memory is a write-once medium in which reprogramming cells requires first erasing the block that contains them. The lifetime of the flash is a function of the number of block erasures and can be as small as several thousands. To…

Information Theory · Computer Science 2015-04-23 Eitan Yaakobi , Alexander Yucovich , Gal Maor , Gala Yadgar

This paper presents a practical writing/reading scheme in nonvolatile memories, called balanced modulation, for minimizing the asymmetric component of errors. The main idea is to encode data using a balanced error-correcting code. When…

Information Theory · Computer Science 2012-09-05 Hongchao Zhou , Anxiao , Jiang , Jehoshua Bruck

Recently, the sparse vector code (SVC) is emerging as a promising solution for short-packet transmission in massive machine type communication (mMTC) as well as ultra-reliable and low-latency communication (URLLC). In the SVC process, the…

Information Theory · Computer Science 2022-09-02 Linjie Yang , Pingzhi Fan

This paper investigates the design and application of write-once memory (WOM) codes for flash memory storage. Using ideas from Merkx ('84), we present a construction of WOM codes based on finite Euclidean geometries over $\mathbb{F}_2$.…

Information Theory · Computer Science 2012-06-26 Kathryn Haymaker , Christine A. Kelley

In this study, a novel coding scheme called highdensity coding based on high-density codebooks using a genetic local search algorithm is proposed. The high-density codebook maximizes the energy transfer capability by maximizing the ratio of…

Signal Processing · Electrical Eng. & Systems 2022-03-21 Dongheon Lee , Gyuyeol Kong , Jang-Won Lee , Sooyong Choi

Memory bandwidth is known to be a performance bottleneck for FPGA accelerators, especially when they deal with large multi-dimensional data-sets. A large body of work focuses on reducing of off-chip transfers, but few authors try to improve…

Hardware Architecture · Computer Science 2024-01-23 Corentin Ferry , Nicolas Derumigny , Steven Derrien , Sanjay Rajopadhye

Random Linear Network Coding (RLNC) has emerged as a powerful tool for robust high-throughput multicast. Projection analysis - a recently introduced technique - shows that the distributed packetized RLNC protocol achieves (order) optimal…

Information Theory · Computer Science 2011-02-17 Bernhard Haeupler , Muriel Médard

Rank modulation has been recently proposed as a scheme for storing information in flash memories. While rank modulation has advantages in improving write speed and endurance, the current encoding approach is based on the "push to the top"…

Information Theory · Computer Science 2011-08-16 Eyal En Gad , Anxiao , Jiang , Jehoshua Bruck

Magnetic random-access memory (MRAM) is a promising memory technology due to its high density, non-volatility, and high endurance. However, achieving high memory fidelity incurs significant write-energy costs, which should be reduced for…

Information Theory · Computer Science 2020-09-22 Yongjune Kim , Yoocharn Jeon , Cyril Guyot , Yuval Cassuto

Optical Wireless Communication networks (OWC) has emerged as a promising technology that enables high-speed and reliable communication bandwidth for a variety of applications. In this work, we investigated applying Random Linear Network…

Information Theory · Computer Science 2023-05-09 Ahmed Ali Hassan , Ahmed Adnan Qidan , Taisir Elgorashi , Jaafar Elmirghani

3D NAND flash memory with advanced multi-level cell techniques provides high storage density, but suffers from significant performance degradation due to a large number of read-retry operations. Although the read-retry mechanism is…

Hardware Architecture · Computer Science 2021-04-21 Jisung Park , Myungsuk Kim , Myoungjun Chun , Lois Orosa , Jihong Kim , Onur Mutlu

Despite the impressive search rate of one key per clock cycle, the update stage of a random-access-memory-based content-addressable-memory (RAM-based CAM) always suffers high latency. Two primary causes of such latency include: (1) the…

Hardware Architecture · Computer Science 2018-06-28 Xuan-Thuan Nguyen , Trong-Thuc Hoang , Hong-Thu Nguyen , Katsumi Inoue , Cong-Kha Pham