Related papers: Low Power Low Voltage Bulk Driven Balanced OTA

Traditionally, the output noise and power supply rejection of low-dropout regulators (LDOs) are optimized to minimize power supply fluctuations, reducing their impact on the low-frequency noise of target voltage-controlled oscillators…

A four-stage operational transconductance amplifier (OTA) for ultra-low-power applications is introduced in this paper. The proposed circuit inclusive of frequency compensation requires minimal transistor count and passives, overcoming the…

Low power oriented circuit optimization consists in selecting the best alternative between gate sizing, buffer insertion and logic structure transformation, for satisfying a delay constraint at minimum area cost. In this paper we used a…

This paper proposes a signal processing methodology of communication system and realized that circuits using operational transconductance amplifier (OTA). Two important classes of communication circuit, delta modulator and compander have…

Balanced truncation (BT) is a model reduction method that utilizes a coordinate transformation to retain eigen-directions that are highly observable and reachable. To address realizability and scalability of BT applied to highly stiff and…

Low-order frequency response models for power systems have a decades-long history in optimization and control problems such as unit commitment, economic dispatch, and wide-area control. With a few exceptions, these models are built upon the…

A stable low dropout (LDO) voltage regulator topology is presented in this paper. LDOs are linear voltage regulators that do not produce ripples in the DC voltage. Despite the close proximity of the supply input voltage to the output, this…

This paper proposes a Low-Power, Energy Efficient 4-bit Binary Coded Decimal (BCD) adder design where the conventional 4-bit BCD adder has been modified with the Clock Gated Power Gating Technique. Moreover, the concept of DVT (Dual-vth)…

This paper presents an output capacitor-less low-dropout regulator (LDO) with a bias switching scheme for biomedical applications with dual-range load currents. Power optimization is crucial for systems with multiple activation modes such…

A modular and scalable converter for medium voltage (MV) AC to low voltage (LV) DC power conversion is proposed; single-phase-modules (SPMs), each consisting of an active-front-end (AFE) stage and an isolated DC-DC stage, are connected in…

A novel design for a low dropout (LDO) voltage regulator is presented and dedicated to power many sections of a typical cellular handset. However, these baseband, RF, and audio sections have different requirements that influence which LDO…

Today every circuit has to face the power consumption issue for both portable device aiming at large battery life and high end circuits avoiding cooling packages and reliability issues that are too complex. It is generally accepted that…

This paper outlines a pathway towards active operation of lowvoltage distribution grids. In these grids, the growing deployment of distributed generation, controllable demand and storage, together with the roll-out of intelligent metering…

Power consumption has emerged as a primary design constraint for integrated circuits (ICs). In the Nano meter technology regime, leakage power has become a major component of total power. Full adder is the basic functional unit of an ALU.…

Operational Amplifiers (Op-Amps) play a crucial role in the field of biomedical engineering, as they enable signal amplification and processing in various medical devices. With the increasing demand for portable and low-power biomedical…

Temperature drift, stress birefringence and low frequency vibration lead to the randomness and fluctuation of the output of optical voltage sensor(OVS). In order to solve the problem, this study adopts the lock-in amplifier technology with…

Historically, VLSI designers have focused on increasing the speed and reducing the area of digital systems. However, the evolution of portable systems and advanced Deep Sub-Micron fabrication technologies have brought power dissipation as…

Demand for on-chip low-dropout regulators (LDOs) with both high power-supply rejection ratio (PSRR) and fast transient response is growing as system-on-chip (SoC) integration increases. However, conventional LDO architectures face…

This paper introduces a novel method for synthesizing digital circuits derived from Binary Decision Diagrams (BDDs) that can yield to reduction in power dissipation. The power reduction is achieved by decreasing the switching activity in a…

The joint design of analog beamforming and power allocation is investigated for a single radio-frequency chain multiuser time-division multiple access system under a max-min signal-to-noise ratio (SNR) criterion. A hardware-efficient…