Related papers: Logic circuits from zero forcing

In this paper, we propose a reflected forward-backward splitting algorithic framework for finding a zero of the sum of finitely many monotone op-erators, including maximally monotone operators, cocoercive operators, and monotone and…

Decision circuits perform efficient evaluation of influence diagrams, building on the ad- vances in arithmetic circuits for belief net- work inference [Darwiche, 2003; Bhattachar- jya and Shachter, 2007]. We show how even more compact…

A new type of deterministic (non-probabilistic) computer logic system inspired by the stochasticity of brain signals is shown. The distinct values are represented by independent stochastic processes: independent voltage (or current) noises.…

Let $\mathbb{F}$ be any field, we consider solving $Ax=b$ repeatedly for a matrix $A\in\mathbb{F}^{n\times n}$ of $m$ non-zero elements, and multiple different $b\in\mathbb{F}^{n}$. If we are given a zero forcing set of $A$ of size $k$, we…

We present an algebraic view on logic programming, related to proof theory and more specifically linear logic and geometry of interaction. Within this construction, a characterization of logspace (deterministic and non-deterministic)…

The aim of these lectures is to give a short introduction to forcing. We will avoid metamathematical issues as much as possible and similarly we will avoid performing the actual construction of forcing. We assume familiarity with basic…

We propose a novel, fully explainable neural approach to synthesis of combinatorial logic circuits from input-output examples. The carrying advantage of our method is that it readily extends to inductive scenarios, where the set of examples…

The increasing advancement of emerging device technologies that provide alternative basis logic sets necessitates the exploration of innovative logic design automation methodologies. Specifically, emerging computing architectures based on…

Four terminal switching network is an alternative structure to realize the logic functions in electronic circuit modeling. This network can be used to implement a Boolean function with less number of switches than the two terminal based…

We propose a general architecture for universal logic operations using NAND and NOR gates on classical information encoded in period-doubled states of periodically-driven systems. The protocol involves applying a single pulse that…

We say that a circuit $C$ over a field $F$ functionally computes an $n$-variate polynomial $P$ if for every $x \in \{0,1\}^n$ we have that $C(x) = P(x)$. This is in contrast to syntactically computing $P$, when $C \equiv P$ as formal…

An abelian processor is an automaton whose output is independent of the order of its inputs. Bond and Levine have proved that a network of abelian processors performs the same computation regardless of processing order (subject only to a…

Zero forcing is a binary coloring game on a graph where a set of filled vertices can force non-filled vertices to become filled following a color change rule. In 2008, the zero forcing number of a graph was shown to be an upper bound on its…

All-spin-based computing combining logic and nonvolatile magnetic memory is promising for emerging information technologies. However, the realization of a universal spin logic operation representing a reconfigurable building block with…

Reversible logic represents the basis for many emerging technologies and has recently been intensively studied. However, most of the Boolean functions of practical interest are irreversible and must be embedded into a reversible function…

We give an algorithm that finds a zero forcing set which approximates the optimal size by a factor of $\text{pw}(G)+1$, where $\text{pw}(G)$ is the pathwidth of $G$. Starting from a path decomposition, the algorithm runs in $O(nm)$ time,…

We revisit existing linear computation coding (LCC) algorithms, and introduce a new framework that measures the computational cost of computing multidimensional linear functions, not only in terms of the number of additions, but also with…

In this paper, we present a general reconfigurable multiple-valued logic circuit. The proposed architecture is based on threshold logic gate and is compatible with binary logic, which allows a designer to easily integrate multiple valued…

In zero forcing, the focus is typically on finding the minimum cardinality of any zero forcing set in the graph; however, the number of cardinalities between $0$ and the number of vertices in the graph for which there are both zero forcing…

We show that logic computational circuits in gene regulatory networks arise from a fibration symmetry breaking in the network structure. From this idea we implement a constructive procedure that reveals a hierarchy of genetic circuits,…