Related papers: Fault Tolerant Variable Block Carry Skip Logic (VB…
We present a fault-tolerant universal quantum computing architecture based on a code concatenation of biased-noise qubits and the parity architecture. The parity architecture can be understood as an LDPC code tailored specifically to obtain…
Control Barrier Functions (CBFs) have been used to enforce safety and task specifications expressed in Signal Temporal Logic (STL). However, existing CBF-STL approaches typically rely on fixed hyperparameters and per-step optimization,…
This paper focuses on the Field Programmable Gate Array (FPGA) design and implementation of intelligent control system applications on a chip, specifically fuzzy logic and genetic algorithm processing units. Initially, an overview of the…
As CMOS nears the end of the projected scaling roadmap, significant effort has been devoted to the search for new materials and devices that can realize memory and logic. Spintronics, is one of the promising directions for the Post-CMOS…
Model-based fault-tolerant control (FTC) often consists of two distinct steps: fault detection & isolation (FDI), and fault accommodation. In this work we investigate posing fault-tolerant control as a single Bayesian inference problem.…
Energy conservative devices are the need of the modern technology which leads to the development of reversible logic. The synthesis of reversible logic has become an intensely studied area as it overcomes the problem of power dissipation…
The FPGA overlay architectures have been mainly proposed to improve design productivity, circuit portability and system debugging. In this paper, we address the use of overlay architectures for building fault tolerant SRAM-based FPGA…
To achieve scalable universal quantum computing, we need to implement a universal set of logical gates fault-tolerantly, for which the main difficulty lies with non-Clifford gates. We demonstrate that several characteristic features of the…
Federated self-supervised learning (FSSL) combines the advantages of decentralized modeling and unlabeled representation learning, serving as a cutting-edge paradigm with strong potential for scalability and privacy preservation. Although…
Progress in quantum hardware design is progressing toward machines of sufficient size to begin realizing quantum algorithms in disciplines such as encryption and physics. Quantum circuits for addition are crucial to realize many quantum…
Typically, fault-tolerant operations and code concatenation are reserved for quantum error correction due to their resource overhead. Here, we show that fault tolerant operations have a large impact on the performance of symmetry based…
This paper proposes a learning-based passive fault-tolerant control (PFTC) method for quadrotor capable of handling arbitrary single-rotor failures, including conditions ranging from fault-free to complete rotor failure, without requiring…
Over the last decade, memristive devices have been widely adopted in computing for various conventional and unconventional applications. While the integration density, memory property, and nonlinear characteristics have many benefits,…
Signal Temporal Logic (STL) specifications play a crucial role in defining complex temporal properties and behaviors in safety-critical cyber-physical systems (CPS). However, fault diagnosis (FD) and fault-tolerant control (FTC) for CPS…
A long-standing goal of computer technology is to process and store digital information with the same device in order to implement new architectures. One way to accomplish this is to use nanomagnetic `non-volatile' logic gates that can…
We present concept and implementation of a self-stabilizing Byzantine fault-tolerant distributed clock generation scheme for multi-synchronous GALS architectures in critical applications. It combines a variant of a recently introduced…
In the "Big Data" era, a lot of data must be processed and moved between processing and memory units. New technologies and architectures have emerged to improve system performance and overcome the memory bottleneck. The memristor is a…
Large-scale quantum computation requires to be performed in the fault-tolerant manner. One crucial challenge of fault-tolerant quantum computing (FTQC) is reducing the overhead of implementing logical gates. Recently work proposed…
As the world enters the age of ubiquitous computing, the need for reconfigurable hardware operating close to the fundamental limits of energy consumption becomes increasingly pressing. Simultaneously, scaling-driven performance improvements…
Parity declustering allows faster reconstruction of a disk array when some disk fails. Moreover, it guarantees uniform reconstruction workload on all surviving disks. It has been shown that parity declustering for one-failure tolerant array…