Related papers: Optimization of reversible sequential circuits
Retrosynthesis is the task of planning a series of chemical reactions to create a desired molecule from simpler, buyable molecules. While previous works have proposed algorithms to find optimal solutions for a range of metrics (e.g.…
Quantum computing leverages the unique properties of qubits and quantum parallelism to solve problems intractable for classical systems, offering unparalleled computational potential. However, the optimization of quantum circuits remains…
It has been experimentally proven that realizing universal quantum gates using higher-radices logic is practically and technologically possible. We developed a Parallel Genetic Algorithm that synthesizes Boolean reversible circuits realized…
The growing demand for ultra low power computing and the emergence of quantum technologies have intensified interest in cryogenic electronics, particularly superconducting devices. Despite their promise, current controlled superconducting…
We present a novel scheme for data processing which is well-suited for implementation at the nanometer scale. The logic circuits comprise two-state cellular units which are driven by externally applied updates, in contrast to earlier…
Previously, we demonstrated hysteretic and persistent changes of resistivity in two-terminal electronic devices based on charge trapping and detrapping at immobile metastable defects [H. Yin, A. Kumar, J.M. LeBeau, and R. Jaramillo, Phys.…
Near-term quantum computations are limited by high error rates, the scarcity of qubits and low qubit connectivity. Increasing support for mid-circuit measurements and qubit reset in near-term quantum computers enables qubit reuse that may…
During the noisy intermediate-scale quantum (NISQ) era, it is important to optimize the quantum circuits in circuit depth and gate count, especially entanglement gates, including the CNOT gate. Among all the unitary operators, diagonal…
Reversible logic has attracted much research interest over the last few decades, especially due to its application in quantum computing. In the construction of reversible gates from basic gates, ancilla bits are commonly used to remove…
Distributed Quantum Computing (DQC) enables scalability by interconnecting multiple QPUs. Among various DQC implementations, quantum data centers (QDCs), which utilize reconfigurable optical switch networks to link QPUs across different…
A limited number of qubits, high error rates, and limited qubit connectivity are major challenges for effective near-term quantum computations. Quantum circuit partitioning divides a quantum computation into a set of computations that…
Quantum heuristics have shown promise in solving various optimization problems, including lattice protein folding. Equally relevant is the inverse problem, protein design, where one seeks sequences that fold to a given target structure. The…
Gate-level clocking, typical in traditional approaches to Single Flux Quantum (SFQ) technology, makes the effective synthesis of superconducting circuits a significant engineering hurdle. This paper addresses this challenge by employing the…
Recently, the demand of low-power deep-learning hardware for industrial applications has been increasing. Most existing artificial intelligence (AI) chips have evolved to rely on new chip technologies rather than on radically new hardware…
By the progressive scaling of the feature size and power consumption in VLSI chips the part of energy dissipated due to information loss in irreversible computations will become a serious limitation in the near future. Quantum-dot cellular…
The relative power of quantum algorithms, using an adaptive access to quantum devices, versus classical post-processing methods that rely only on an initial quantum data set, remains the subject of active debate. Here, we present evidence…
Dynamical decoupling is effective in reducing gate errors in most quantum computation platforms and is therefore projected to play an essential role in future fault-tolerant constructions. In superconducting circuits, however, it has proven…
In classic settings of garbled circuits, each gate type is leaked to improve both space and speed optimization. Zahur et al. have shown in EUROCRYPT 2015 that a typical linear garbling scheme requires at least two $\lambda$-bit elements per…
Modern integrated circuits are essentially two-dimensional (2D). Partial three-dimensional (3D) integration and 3D-transistor-level integrated circuits have long been anticipated as routes to improve the performance, cost and size of…
Logic locking has become a promising approach to provide hardware security in the face of a possibly insecure fabrication supply chain. While many techniques have focused on locking combinational logic (CL), an alternative latch-locking…