Related papers: The PRO1 ASIC for Fast Wilkinson Encoding

Conventional sub-Nyquist sampling methods for analog signals exploit prior information about the spectral support. In this paper, we consider the challenging problem of blind sub-Nyquist sampling of multiband signals, whose unknown…

We have designed three ASICs for possible applications in the optical links of a new layer of pixel detector in the ATLAS experiment for the first phase of the LHC luminosity upgrade. The ASICs include a high-speed driver for the VCSEL, a…

Learned image compression (LIC) methods often employ symmetrical encoder and decoder architectures, evitably increasing decoding time. However, practical scenarios demand an asymmetric design, where the decoder requires low complexity to…

This work presents the first measurements performed on the Timespot1 ASIC. As the second prototype developed for the TimeSPOT project, the ASIC features a 32x32 channels hybrid-pixel matrix. Targeted to space-time tracking applications in…

We demonstrate a real-time transient waveform digitizer with a record 1 TSa/s (Tera-Sample/sec) sampling rate. This is accomplished by using a photonic time stretch preprocessor which slows down the electrical waveform before it is captured…

This paper presents a fully integrated second-order level-crossing sampling data converter for real-time data compression and feature extraction. Compared with level-sampling ADCs which sample at fixed voltage levels, the proposed circuits…

The power consumption of digital-to-analog converters (DACs) constitutes a significant proportion of the total power consumption in a massive multiuser multiple-input multiple-output (MU-MIMO) base station (BS). Using 1-bit DACs can…

Key parameters of analog-to-digital converters (ADCs) are their sampling rate and dynamic range. Power consumption and cost of an ADC are directly proportional to the sampling rate; hence, it is desirable to keep it as low as possible. The…

One-bit quantization with time-varying sampling thresholds has recently found significant utilization potential in statistical signal processing applications due to its relatively low power consumption and low implementation cost. In…

Certain sensing applications such as Internet of Things (IoTs), where the sensing phenomenon may change rapidly in both time and space, requires sensors that consume ultra-low power (so that they do not need to be put to sleep leading to…

In this paper the PreAmplifier ShAper (PASA) for the Time Projection Chamber (TPC) of the ALICE experiment at LHC is presented. The ALICE TPC PASA is an ASIC that integrates 16 identical channels, each consisting of Charge Sensitive…

Polar codes are a class of linear block codes that provably achieves channel capacity. They have been selected as a coding scheme for the control channel of enhanced mobile broadband (eMBB) scenario for $5^{\text{th}}$ generation wireless…

The need for a high-performance transceiver with high Signal to Noise Ratio (SNR) has driven the communication system to utilize the latest technique identified as oversampling systems. It was the most economical modulator and decimation in…

A modulated wideband converter (MWC) has been introduced as a sub-Nyquist sampler that exploits a set of fast alternating pseudo random (PR) signals. Through parallel sampling branches, an MWC compresses a multiband spectrum by mixing it…

This paper investigates a hardware-efficient massive multiple-input multiple-output integrated sensing and communication (MIMO-ISAC) system with 1-bit analog-to-digital converters (ADCs)/digital-to-analog converters (DACs). The proposed…

While design of high performance lenses and image sensors has long been the focus of camera development, the size, weight and power of image data processing components is currently the primary barrier to radical improvements in camera…

One-bit digital-to-analog converters (DACs) are a practical and promising solution for reducing cost and power consumption in massive multiple-input multiple-output (MIMO) systems. However, the one-bit precoding problem is NP-hard and even…

This paper describes a pipelined analog-to-digital converter (ADC) employing a power and area efficient architecture. The adjacent stages of a pipeline share operational amplifiers. In order to keep accuracy of the amplifiers in the first…

We present a programmable 16 channel, mixed signal, low power readout ASIC, having the project historically named Gigasample Recorder of Analog waveforms from a PHotodetector (GRAPH). It is designed to read large aperture single photon…

To unleash the potential of quantum computers, noise effects on qubits' performance must be carefully managed. The decoders responsible for diagnosing noise-induced computational errors must use resources efficiently to enable scaling to…