Related papers: Nonvolatile Static Random Access Memory (NV-SRAM) …
This study investigates strategies for minimizing Joule losses in resistive random access memory (ReRAM) cells, which are also referred to as memristive devices. Typically, the structure of ReRAM cells involves a nanoscale layer of…
Binary matrix-vector multiplication (BMVM) is a key operation in post-quantum cryptography schemes like the Classic McEliece cryptosystem. Conventional computing architectures incur significant energy efficiency loss due to data movement of…
Magnetic tunnel junctions (MTJs) interconnected via a continuous ferromagnetic free layer were fabricated for Spin Torque Majority Gate (STMG) logic. The MTJs are biased independently and show magnetoelectric response under spin transfer…
Graphical probabilistic circuit models of stochastic computing are more powerful than the predominant deep learning models, but also have more demanding requirements. For example, they require "programmable stochasticity", e.g. generating…
Magnetic tunnel junction (MTJ) based on van der Waals (vdW) magnetic layers has been found to present excellent tunneling magnetoresistance (TMR) property, which has great potential applications in field sensing, non-volatile magnetic…
Resistance switching devices are of special importance because of their application in resistive memories (RRAM) which are promising candidates for replacing current nonvolatile memories and realize storage class memories. These devices…
NVM-based systems are naturally fit candidates for incorporating periodic checkpointing (or snapshotting). This increases the reliability of the system, makes it more immune to power failures, and reduces wasted work in especially an HPC…
There are pressing problems with traditional computing, especially for accomplishing data-intensive and real-time tasks, that motivate the development of in-memory computing devices to both store information and perform computation.…
The conventional von Neumann architecture has been revealed as a major performance and energy bottleneck for rising data-intensive applications. %, due to the intensive data movements. The decade-old idea of leveraging in-memory processing…
Domain-wall memory (DWM) has SRAM class access performance, low energy, high endurance, high density, and CMOS compatibility. Recently, shift reliability and processing-using-memory (PuM) proposals developed a need to count the number of…
Spintronic devices have recently attracted a lot of attention in the field of unconventional computing due to their non-volatility for short and long term memory, non-linear fast response and relatively small footprint. Here we report how…
The spatiotemporal nature of neuronal behavior in spiking neural networks (SNNs) make SNNs promising for edge applications that require high energy efficiency. To realize SNNs in hardware, spintronic neuron implementations can bring…
Quantum random access memories (QRAMs) are pivotal for data-intensive quantum algorithms, but existing general-purpose and domain-specific architectures are hampered by a critical bottleneck: a heavy reliance on non-Clifford gates (e.g.,…
This paper presents a PVT-resilient, subthreshold SRAM-based computing-in-memory (CIM) macro tailored for energy-efficient spiking neural networks (SNNs). The macro integrates in-situ current sensors and distributed voltage regulators to…
Accommodating all the weights on-chip for large-scale NNs remains a great challenge for SRAM based computing-in-memory (SRAM-CIM) with limited on-chip capacity. Previous non-volatile SRAM-CIM (nvSRAM-CIM) addresses this issue by integrating…
We investigated the low temperature performance of CoFeB/MgO based perpendicular magnetic tunnel junctions (pMTJs) by characterizing their quasi-static switching voltage, high speed pulse write error rate and endurance down to 9 K. pMTJ…
Processing-in-memory (PIM) is attractive to overcome the limitations of modern computing systems. Numerous PIM systems exist, varying by the technologies and logic techniques used. Successful operation of specific logic functions is crucial…
We present a framework dedicated to modelling the resistive switching operation of Valence Change Memory (VCM) cells. The method combines an atomistic description of the device structure, a Kinetic Monte Carlo (KMC) model for the creation…
In combinatorial optimization, probabilistic Ising machines (PIMs) have gained significant attention for their acceleration of Monte Carlo sampling with the potential to reduce time-to-solution in finding approximate ground states. However,…
Byte-addressable non-volatile memory (NVM) features high density, DRAM comparable performance, and persistence. These characteristics position NVM as a promising new tier in the memory hierarchy. Nevertheless, NVM has asymmetric read and…