Related papers: Area-Efficient Selective Multi-Threshold CMOS Desi…

The advanced complex electronic systems increasingly demand safer and more secure hardware parts. Correspondingly, fault injection became a major verification milestone for both safety- and security-critical applications. However, fault…

This paper studies the setup of a multiple-relay network in which $K$ half-duplex multiple-antenna relays assist in the transmission between a/several multiple-antenna transmitter(s) and a multiple-antenna receiver. Each two nodes are…

This paper introduces a new scheme of LT codes, named multiple configurations. In multiple configurations LT codes (MC-LT codes), multiple sets of output symbols are simultaneously provided to receivers for recovering the source data. Each…

Leakage, the occupation of any state not used in the computation, is one of the of the most devastating errors in quantum error correction. Transmons, the most common superconducting qubits, are weakly anharmonic multilevel systems, and are…

This study examines analog beamforming designs utilizing multi-panel arrays for millimeter-wave (mmWave) communication systems under stochastic path blockages where each panel is an integrated circuit that includes power amplifiers, a…

We consider a cooperative wireless network comprised of a source, a destination and multiple relays operating in the presence of an eavesdropper, which attempts to tap the source-destination transmission. We propose multi-relay selection…

An interleaving technique is proposed to enhance the throughput of current-mode CMOS discrete time chaotic sources based on the iteration of unidimensional maps. A discussion of the reasons and the advantages offered by the approach is…

The bridge arm of the hybrid modular multilevel converter (MMC) is composed of half-bridge and full-bridge sub-modules cascaded together. Compared with the half-bridge MMC, it can operate in the boost-AC mode, where the modulation index can…

Whereas contemporary Error Correcting Codes (ECC) designs occupy a significant fraction of total die area in chip-multiprocessors (CMPs), approaches to deal with the vulnerability increase of CMP architecture against Single Event Upsets…

This paper describes a novel design of a threshold logic gate (a binary perceptron) and its implementation as a standard cell. This new cell structure, referred to as flash threshold logic (FTL), uses floating gate (flash) transistors to…

DRAM is the prevalent main memory technology, but its long access latency can limit the performance of many workloads. Although prior works provide DRAM designs that reduce DRAM access latency, their reduced storage capacities hinder the…

In this paper, we propose a novel transmission scheme, called sparse layered MIMO (SL-MIMO), that combines non-orthogonal transmission and singular value decomposition (SVD) precoding. Nonorthogonality in SL-MIMO allows re-using of the…

Rate splitting multiple access (RSMA) has firmly established itself as a powerful methodology for multiple access, interference management, and multi-user strategy for next-generation communication systems. In this paper, we propose a novel…

We study improved degree distribution for Luby Transform (LT) codes which exhibits improved bit error rate performance particularly in low overhead regions. We construct the degree distribution by modifying Robust Soliton distribution. The…

In this paper, a symbol-level selective transmission for full-duplex (FD) relaying networks is proposed to mitigate error propagation effects and improve system spectral efficiency. The idea is to allow the FD relay node to predict the…

Traditional transistors based on complementary metal-oxide-semiconductor (CMOS) and metal-oxide-semiconductor field-effect transistors (MOSFETs) are facing significant limitations as device scaling reaches the limits of Moore's Law. These…

We study the problem of optimally generating quantum gates in a logical subspace embedded in a larger Hilbert space, where the dynamics is also affected by unknown static imperfections. This general problem is widespread across various…

An extension of the popular diversity-multiplexing tradeoff framework to the low-SNR (or wideband) regime is proposed. The concept of diversity gain is shown to be redundant in this regime since the outage probability is SNR-independent and…

A threshold logic gate (TLG) performs weighted sum of multiple inputs and compares the sum with a threshold. We propose Spin-Memeristor Threshold Logic (SMTL) gates, which employ memristive cross-bar array (MCA) to perform current-mode…

In this paper, we present a novel cache design based on Multi-Level Cell Spin-Transfer Torque RAM (MLC STTRAM) that can dynamically adapt the set capacity and associativity to use efficiently the full potential of MLC STTRAM. We exploit the…