Related papers: Soft-Error Tolerance Analysis and Optimization of …
It is now widely accepted that the CMOS technology implementing irreversible logic will hit a scaling limit beyond 2016, and that the increased power dissipation is a major limiting factor. Reversible computing can potentially require…
Iterative numerical algorithms are typically equipped with a stopping criterion, where the iteration process is terminated when some error or misfit measure is deemed to be below a given tolerance. This is a useful setting for comparing…
In this paper, we present an accurate but very fast soft error rate (SER) estimation technique for digital circuits based on error propagation probability (EPP) computation. Experiments results and comparison of the results with the random…
In hardware accelerators used in data centers and safety-critical applications, soft errors and resultant silent data corruption significantly compromise reliability, particularly when upsets occur in control-flow operations, leading to…
Errors due to hardware or low level software problems, if detected, can be fixed by various schemes, such as recomputation from a checkpoint. Silent errors are errors in application state that have escaped low-level error detection. At…
We introduce a novel universal soft-decision decoding algorithm for binary block codes called ordered reliability direct error pattern testing (ORDEPT). Our results, obtained for a variety of popular short high-rate codes, demonstrate that…
Fault tolerance is a critical aspect of modern computing systems, ensuring correct functionality in the presence of faults. This paper presents a comprehensive survey of fault tolerance methods and software-based mitigation techniques in…
Efforts to scale-up quantum computation have reached a point where the principal limiting factor is not the number of qubits, but the entangling gate infidelity. However, the highly detailed system characterization required to understand…
A fully fault-tolerant implementation of the quantum error-detecting Iceberg $[[2m, 2m-2, 2]]$ code applied to a Toffoli circuit achieved beyond-break-even error detection on a leading trapped-ion quantum computer, where the effect of…
In the shallow sub-threshold regime, fault-tolerant quantum computation requires a tremendous amount of qubits. In this paper, we study the error correction in the deep sub-threshold regime. We estimate the physical error rate for achieving…
With gate error rates in multiple technologies now below the threshold required for fault-tolerant quantum computation, the major remaining obstacle to useful quantum computation is scaling, a challenge greatly amplified by the huge…
The use of carbon nanotube (CNT) field-effect transistors (FETs) in microwave circuit design requires an appropriate, immediate and efficient description of their performance. This work describes a technique to extract the parameters of an…
High-speed, accuracy, meticulousness and quick response are notion of the vital necessities for modern digital world. An efficient electronic circuit unswervingly affects the maneuver of the whole system. Different tools are required to…
In recent years the power systems research community has seen an explosion of work applying operations research techniques to challenging power network optimization problems. Regardless of the application under consideration, all of these…
We present QEst, a procedure to systematically generate approximations for quantum circuits to reduce their CNOT gate count. Our approach employs circuit partitioning for scalability with procedures to 1) reduce circuit length using…
We investigate parameter-efficient fine-tuning (PEFT) methods that can provide good accuracy under limited computational and memory budgets in the context of large language models (LLMs). We present a new PEFT method called Robust…
Transformer models rely on High-Performance Computing (HPC) resources for inference, where soft errors are inevitable in large-scale systems, making the reliability of the model particularly critical. Existing fault tolerance frameworks for…
A common approach to deal with gate errors in modern quantum-computing hardware is zero-noise extrapolation. By artificially amplifying errors and extrapolating the expectation values obtained with different error strengths towards the…
Fidelity is one of the most valuable and commonly used metrics for assessing the performance of quantum circuits on error-prone quantum processors. Several approaches have been proposed to estimate circuit fidelity without executing it on…
Developing soft circuits from individual soft logic gates poses a unique challenge: with increasing numbers of logic gates, the design and implementation of circuits leads to inefficiencies due to mathematically unoptimized circuits and…