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Parameter-efficient fine-tuning aims to achieve performance comparable to fine-tuning, using fewer trainable parameters. Several strategies (e.g., Adapters, prefix tuning, BitFit, and LoRA) have been proposed. However, their designs are…

Computation and Language · Computer Science 2023-01-06 Jiaao Chen , Aston Zhang , Xingjian Shi , Mu Li , Alex Smola , Diyi Yang

A composable infrastructure is defined as resources, such as compute, storage, accelerators and networking, that are shared in a pool and that can be grouped in various configurations to meet application requirements. This freedom to 'mix…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-03-22 Kauotar El Maghraoui , Lorraine M. Herger , Chekuri Choudary , Kim Tran , Todd Deshane , David Hanson

In order to improve system performance efficiently, a number of systems choose to equip multi-core and many-core processors (such as GPUs). Due to their discrete memory these heterogeneous architectures comprise a distributed system within…

Distributed, Parallel, and Cluster Computing · Computer Science 2015-02-27 Hao Wu , Daniel Lohmann , Wolfgang Schröder-Preikschat

Partial Reconfiguration (PR) is a technique that allows reconfiguring the FPGA chip at runtime. However, current design support tools require manual floorplanning of the partial modules. Several approaches have been proposed in this field,…

Hardware Architecture · Computer Science 2019-04-25 Norbert Deak , Octavian Creţ , Horia Hedeşiu

Scheduling applications on wide-area distributed systems is useful for obtaining quick and reliable results in an efficient manner. Optimized scheduling algorithms are fundamentally important in order to achieve optimized resources…

Distributed, Parallel, and Cluster Computing · Computer Science 2011-06-28 Diana Moise , Eliza Moise , Florin Pop , Valentin Cristea

In a context of ever-growing worldwide communication traffic, cloud service providers aim at deploying scalable infrastructures to address heterogeneous needs. Part of the network infrastructure, FPGAs are tailored to guarantee low-latency…

Hardware Architecture · Computer Science 2026-01-22 Jean Bruant , Pierre-Henri Horrein , Olivier Muller , Frédéric Pétrot

In most constraint programming systems, a limited number of search engines is offered while the programming of user-customized search algorithms requires low-level efforts, which complicates the deployment of such algorithms. To alleviate…

Programming Languages · Computer Science 2016-02-05 Yong Lin , Martin Henz

Coarse grained overlay architectures improve FPGA design productivity by providing fast compilation and software-like programmability. Throughput oriented spatially configurable overlays typically suffer from area overheads due to the…

Hardware Architecture · Computer Science 2016-06-22 Xiangwei Li , Abhishek Jain , Douglas Maskell , Suhaib A. Fahmy

Deploying deep convolutional neural networks (CNNs) on resource-constrained devices presents significant challenges due to their high computational demands and rigid, static architectures. To overcome these limitations, this thesis explores…

Machine Learning · Computer Science 2025-05-20 Pooja Mangal , Sudaksh Kalra , Dolly Sapra

Contextual Partitioning introduces an innovative approach to enhancing the architectural design of large-scale computational models through the dynamic segmentation of parameters into context-aware regions. This methodology emphasizes the…

Computation and Language · Computer Science 2025-08-11 Offa Kingsleigh , Alfred Abercrombie , David Woolstencroft , Beorhtric Meadowcroft , Marcus Irvin

In recent years the computing landscape has seen an in- creasing shift towards specialized accelerators. Field pro- grammable gate arrays (FPGAs) are particularly promising as they offer significant performance and energy improvements…

Distributed, Parallel, and Cluster Computing · Computer Science 2015-11-24 Raghu Prabhakar , David Koeplinger , Kevin Brown , HyoukJoong Lee , Christopher De Sa , Christos Kozyrakis , Kunle Olukotun

It is a challenging task to train large DNN models on sophisticated GPU platforms with diversified interconnect capabilities. Recently, pipelined training has been proposed as an effective approach for improving device utilization. However,…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-07-03 Shiqing Fan , Yi Rong , Chen Meng , Zongyan Cao , Siyu Wang , Zhen Zheng , Chuan Wu , Guoping Long , Jun Yang , Lixue Xia , Lansong Diao , Xiaoyong Liu , Wei Lin

Deep research agents, which synthesize information across diverse sources, are significantly constrained by the sequential nature of reasoning. This bottleneck results in high latency, poor runtime adaptability, and inefficient resource…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-03-31 Lunyiu Nie , Nedim Lipka , Ryan A. Rossi , Swarat Chaudhuri

Modern computing workloads, particularly in AI and edge applications, demand hardware-software co-design to meet aggressive performance and energy targets. Such co-design benefits from open and agile platforms that replace closed,…

Hardware Architecture · Computer Science 2025-08-27 Rohan Juneja , Pranav Dangi , Thilini Kaushalya Bandara , Zhaoying Li , Dhananjaya Wijerathne , Li-Shiuan Peh , Tulika Mitra

The memory system of a modern embedded processor consumes a large fraction of total system energy. We explore a range of different configuration options and show that a reconfigurable design can make better use of the resources available to…

Hardware Architecture · Computer Science 2016-01-08 Daniel Bates , Alex Chadwick , Robert Mullins

Grids enable the aggregation, virtualization and sharing of massive heterogeneous and geographically dispersed resources, using files, applications and storage devices, to solve computation and data intensive problems, across institutions…

Software Engineering · Computer Science 2007-07-06 David Manset , Herve Verjus , Richard McClatchey

New hardware can substantially increase the speed and efficiency of deep neural network training. To guide the development of future hardware architectures, it is pertinent to explore the hardware and machine learning properties of…

Machine Learning · Computer Science 2021-04-13 Atli Kosson , Vitaliy Chiley , Abhinav Venigalla , Joel Hestness , Urs Köster

As Grid computing is becoming an inevitable future, managing, scheduling and monitoring dynamic, heterogeneous resources will present new challenges. Solutions will have to be agile and adaptive, support self-organization and autonomous…

Distributed, Parallel, and Cluster Computing · Computer Science 2007-11-05 Aleksandar Lazarevic , Lionel Sacks

Deep learning has achieved state-of-the-art performance on several computer vision tasks and domains. Nevertheless, it still has a high computational cost and demands a significant amount of parameters. Such requirements hinder the use in…

Computer Vision and Pattern Recognition · Computer Science 2024-07-08 Samuel Felipe dos Santos , Rodrigo Berriel , Thiago Oliveira-Santos , Nicu Sebe , Jurandy Almeida

The next generation HPC and data centers are likely to be reconfigurable and data-centric due to the trend of hardware specialization and the emergence of data-driven applications. In this paper, we propose ARENA -- an asynchronous…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-04-20 Cheng Tan , Chenhao Xie , Tong Geng , Andres Marquez , Antonino Tumeo , Kevin Barker , Ang Li