English

Verifying RISC-V Physical Memory Protection

Cryptography and Security 2022-11-07 v1

Abstract

We formally verify an open-source hardware implementation of physical memory protection (PMP) in RISC-V, which is a standard feature used for memory isolation in security critical systems such as the Keystone trusted execution environment. PMP provides per-hardware-thread machine-mode control registers that specify the access privileges for physical memory regions. We first formalize the functional property of the PMP rules based on the RISC-V ISA manual. Then, we use the LIME tool to translate an open-source implementation of the PMP hardware module written in Chisel to the UCLID5 formal verification language. We encode the formal specification in UCLID5 and verify the functional correctness of the hardware. This is an initial effort towards verifying the Keystone framework, where the trusted computing base (TCB) relies on PMP to provide security guarantees such as integrity and confidentiality.

Cite

@article{arxiv.2211.02179,
  title  = {Verifying RISC-V Physical Memory Protection},
  author = {Kevin Cheang and Cameron Rasmussen and Dayeol Lee and David W. Kohlbrenner and Krste Asanović and Sanjit A. Seshia},
  journal= {arXiv preprint arXiv:2211.02179},
  year   = {2022}
}

Comments

SECRISC-V 2019 Workshop

R2 v1 2026-06-28T05:09:17.402Z