Cryptographic schemes like Fully Homomorphic Encryption (FHE) and Zero-Knowledge Proofs (ZKPs), while offering powerful privacy-preserving capabilities, are often hindered by their computational complexity. Polynomial multiplication, a core operation in these schemes, is a major performance bottleneck. While algorithmic advancements and specialized hardware like GPUs and FPGAs have shown promise in accelerating these computations, the recent surge in AI accelerators (TPUs/NPUs) presents a new opportunity. This paper explores the potential of leveraging TPUs/NPUs to accelerate polynomial multiplication, thereby enhancing the performance of FHE and ZKP schemes. We present techniques to adapt polynomial multiplication to these AI-centric architectures and provide a preliminary evaluation of their effectiveness. We also discuss current limitations and outline future directions for further performance improvements, paving the way for wider adoption of advanced cryptographic tools.
@article{arxiv.2307.06554,
title = {TPU as Cryptographic Accelerator},
author = {Rabimba Karanjai and Sangwon Shin and and Wujie Xiong and Xinxin Fan and Lin Chen and Tianwei Zhang and Taeweon Suh and Weidong Shi and Veronika Kuchta and Francesco Sica and Lei Xu},
journal= {arXiv preprint arXiv:2307.06554},
year = {2024}
}
Comments
Accepted to be presented in HASP 24, as part of MICRO 2024