In this paper, the time-dependent dielectric breakdown (TDDB) in sub-1-nm equivalent oxide thickness (EOT) n-type bulk FinFETs is studied. The gate stacks consist of an IMEC clean interfacial layer, atomic layer deposition HfO2 high-k and TiN metal electrode. For the 0.8-nm EOT FinFETs, it is found that TDDB lifetime is consistent with results of planar devices for areas around 1e-8 cm2, implying that the FinFET architecture does not seem to introduce new failure mechanisms. However, for devices with smaller area, the extrapolated voltage at a ten-year lifetime for soft breakdown (SBD) does not meet the specifications, and as a consequence, the SBD path wear-out will have to be included in the final extrapolation. Furthermore, it is shown that for EOTs smaller than 0.8 nm, the TDDB reliability on n-type FinFETs is challenged by the high leakage currents.
Cite
@article{arxiv.2402.00886,
title = {Time-Dependent Dielectric Breakdown on Subnanometer EOT nMOS FinFETs},
author = {Pedro C. Feijoo and Thomas Kauerauf and María Toledano-Luque and Mitsuhiro Togo and Enrique San Andrés and Guido Groeseneken},
journal= {arXiv preprint arXiv:2402.00886},
year = {2024}
}