English

Taming x86-TSO Persistency (Extended Version)

Programming Languages 2020-10-28 v2 Distributed, Parallel, and Cluster Computing

Abstract

We study the formal semantics of non-volatile memory in the x86-TSO architecture. We show that while the explicit persist operations in the recent model of Raad et al. from POPL'20 only enforce order between writes to the non-volatile memory, it is equivalent, in terms of reachable states, to a model whose explicit persist operations mandate that prior writes are actually written to the non-volatile memory. The latter provides a novel model that is much closer to common developers' understanding of persistency semantics. We further introduce a simpler and stronger sequentially consistent persistency model, develop a sound mapping from this model to x86, and establish a data-race-freedom guarantee providing programmers with a safe programming discipline. Our operational models are accompanied with equivalent declarative formulations, which facilitate our formal arguments, and may prove useful for program verification under x86 persistency.

Keywords

Cite

@article{arxiv.2010.13593,
  title  = {Taming x86-TSO Persistency (Extended Version)},
  author = {Artem Khyzha and Ori Lahav},
  journal= {arXiv preprint arXiv:2010.13593},
  year   = {2020}
}
R2 v1 2026-06-23T19:39:15.578Z