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Sustainable Hardware Specialization

Hardware Architecture 2024-11-15 v1

Abstract

Hardware specialization is commonly viewed as a way to scale performance in the dark silicon era with modern-day SoCs featuring multiple tens of dedicated accelerators. By only powering on hardware circuitry when needed, accelerators fundamentally trade off chip area for power efficiency. Dark silicon however comes with a severe downside, namely its environmental footprint. While hardware specialization typically reduces the operational footprint through high energy efficiency, the embodied footprint incurred by integrating additional accelerators on chip leads to a net overall increase in environmental footprint, which has led prior work to conclude that dark silicon is not a sustainable design paradigm. We explore sustainable hardware specialization through reconfigurable logic that has the potential to drastically reduce the environmental footprint compared to a sea of accelerators by amortizing its embodied footprint across multiple applications. We present an abstract analytical model that evaluates the sustainability implications of replacing dedicated accelerators with a reconfigurable accelerator. We derive hardware synthesis results on ASIC and CGRA (a representative reconfigurable fabric) for chip area and energy numbers for a wide variety of kernels. We input these results to the analytical model and conclude that reconfigurable fabric is more sustainable. We find that as few as a handful to a dozen accelerators can be replaced by a CGRA. Moreover, replacing a sea of accelerators with a CGRA leads to a drastically reduced environmental footprint (by a factor of 2.5×2.5 \times to 7.6×7.6 \times).

Keywords

Cite

@article{arxiv.2411.09315,
  title  = {Sustainable Hardware Specialization},
  author = {Pranav Dangi and Thilini Kaushalya Bandara and Saeideh Sheikhpour and Tulika Mitra and Lieven Eeckhout},
  journal= {arXiv preprint arXiv:2411.09315},
  year   = {2024}
}
R2 v1 2026-06-28T19:59:39.197Z