English

SRAM-SUC: Ultra-Low Latency Robust Digital PUF

Cryptography and Security 2021-06-15 v1

Abstract

Secret Unknown Ciphers (SUC) have been proposed recently as digital clone-resistant functions overcoming some of Physical(ly) Unclonable Functions (PUF) downsides, mainly their inconsistency because of PUFs analog nature. In this paper, we propose a new practical mechanism for creating internally random ciphers in modern volatile and non-volatile SoC FPGAs, coined as SRAM-SUC. Each created random cipher inside a SoC FPGA constitutes a robust digital PUF. This work also presents a class of involutive SUCs, optimized for the targeted SoC FPGA architecture, as sample realization of the concept; it deploys a generated class of involutive 8-bit S-Boxes, that are selected randomly from a defined large set through an internal process inside the SoC FPGA. Hardware and software implementations show that the resulting SRAM-SUC has ultra-low latency compared to well-known PUF-based authentication mechanisms. SRAM-SUC requires only 2.88/0.72μs2.88/0.72 \mu s to generate a response for a challenge at 50/200 MHz respectively. This makes SRAM-SUC a promising and appealing solution for Ultra-Reliable Low Latency Communication (URLLC).

Keywords

Cite

@article{arxiv.2106.07105,
  title  = {SRAM-SUC: Ultra-Low Latency Robust Digital PUF},
  author = {Ayoub Mars and Hussam Ghandour and Wael Adi},
  journal= {arXiv preprint arXiv:2106.07105},
  year   = {2021}
}

Comments

13 pages, 15 figures, 6 tables

R2 v1 2026-06-24T03:09:12.373Z