Space-time tradeoff in networked virtual distillation

In contrast to monolithic devices, modular, networked quantum architectures are based on interconnecting smaller quantum hardware nodes using quantum communication links, and offer a promising approach to scalability. Virtual distillation (VD) is a technique that can, under ideal conditions, suppress errors exponentially as the number of quantum state copies increases. However, additional gate operations required for VD introduce further errors, which may limit its practical effectiveness. In this work, we analyse three practical implementations of VD that correspond to edge cases that maximise space-time tradeoffs. Specifically, we consider an implementation that minimises the number of qubits but introduces significantly deeper quantum circuits, and contrast it with implementations that parallelise the preparation of copies using additional qubits, including a constant-depth implementation. We rigorously characterise their circuit depth and gate count requirements, and develop explicit architectures for implementing them in networked quantum systems -- while also detailing implementations in early fault-tolerant quantum architectures. We numerically compare the performance of the three implementations under realistic noise characteristics of networked ion trap systems and conclude the following. Firstly, VD effectively suppresses errors even for very noisy states. Secondly, the constant-depth implementation consistently outperforms the implementation that minimises the number of qubits. Finally, the approach is highly robust to errors in remote entangling operations, with noise in local gates being the main limiting factor to its performance.