Single flux quantum (SFQ) logic is a promising candidate to replace the CMOS logic for high speed and low power applications due to its superiority in providing high performance and energy efficient circuits. However, developing effective Electronic Design Automation (EDA) tools, which cater to special characteristics and requirements of SFQ circuits such as depth minimization and path balancing, are essential to automate the whole process of designing large SFQ circuits. In this paper, a novel technology mapping tool, called SFQmap, is presented, which provides optimization methods for minimizing first the circuit depth and path balancing overhead and then the worst-case stage delay of mapped SFQ circuits. Compared with the state-of-the-art technology mappers, SFQmap reduces the depth and path balancing overhead by an average of 14% and 31%, respectively.
@article{arxiv.1901.00894,
title = {SFQmap: A Technology Mapping Tool for Single Flux Quantum Logic Circuits},
author = {Ghasem Pasandi and Alireza Shafaei and Massoud Pedram},
journal= {arXiv preprint arXiv:1901.00894},
year = {2019}
}