This paper presents a CMOS-compatible Lechner-Hauke-Zoller (LHZ)--based analog tile structure as a fundamental unit for developing scalable analog Ising machines (IMs). In the designed LHZ tile, the voltage-controlled oscillators are employed as the physical Ising spins, while for the ancillary spins, we introduce an oscillator-based circuit to emulate the constraint needed to ensure the correct functionality of the tile. We implement the proposed LHZ tile in 12nm FinFET technology using the Cadence Virtuoso. Simulation results show the proposed tile could converge to the results in about 31~ns. Also, the designed spins could operate at approximately 13~GHz.
@article{arxiv.2410.16079,
title = {SAIM: Scalable Analog Ising Machine for Solving Quadratic Binary Optimization Problems},
author = {Sasan Razmkhah and Jui-Yu Huang and Mehdi Kamal and Massoud Pedram},
journal= {arXiv preprint arXiv:2410.16079},
year = {2024}
}
Comments
5 pages, 8 figures, "This work has been submitted to the IEEE for possible publication."