Running a Quantum Circuit at the Speed of Data
Abstract
We analyze circuits for a number of kernels from popular quantum computing applications, characterizing the hardware resources necessary to take ancilla preparation off the critical path. The result is a chip entirely dominated by ancilla generation circuits. To address this issue, we introduce optimized ancilla factories and analyze their structure and physical layout for ion trap technology. We introduce a new quantum computing architecture with highly concentrated data-only regions surrounded by shared ancilla factories. The results are a reduced dependence on costly teleportation, more efficient distribution of generated ancillae and more than five times speedup over previous proposals.
Cite
@article{arxiv.0804.4725,
title = {Running a Quantum Circuit at the Speed of Data},
author = {Nemanja Isailovic and Mark Whitney and Yatish Patel and John Kubiatowicz},
journal= {arXiv preprint arXiv:0804.4725},
year = {2008}
}
Comments
To appear in 35th International Symposium on Computer Architecture (ISCA '08)