Industrial chip development is inherently iterative, favoring localized, intent-driven updates over rewriting RTL from scratch. Yet most LLM-Aided Hardware Design (LAD) work focuses on one-shot synthesis, leaving this workflow underexplored. To bridge this gap, we for the first time formalize ΔSpec-to-RTL localization, a multi-positive problem mapping natural language change requests (ΔSpec) to the affected Register Transfer Level (RTL) syntactic blocks. We propose RTLocating, an intent-aware RTL localization framework, featuring a dynamic router that adaptively fuses complementary views from a textual semantic encoder, a local structural encoder, and a global interaction and dependency encoder (GLIDE). To enable scalable supervision, we introduce EvoRTL-Bench, the first industrial-scale benchmark for intent-code alignment derived from OpenTitan's Git history, comprising 1,905 validated requests and 13,583 ΔSpec-RTL block pairs. On EvoRTL-Bench, RTLocating achieves 0.568 MRR and 15.08% R@1, outperforming the strongest baseline by +22.9% and +67.0%, respectively, establishing a new state-of-the-art for intent-driven localization in evolving hardware designs.
Cite
@article{arxiv.2603.00434,
title = {RTLocating: Intent-aware RTL Localization for Hardware Design Iteration},
author = {Changwen Xing and Yanfeng Lu and Lei Qi and Chenxu Niu and Jie Li and Xi Wang and Yong Chen and Jun Yang},
journal= {arXiv preprint arXiv:2603.00434},
year = {2026}
}