In our previous work we have introduced the logic STL*, an extension of Signal Temporal Logic (STL) that allows value freezing. In this paper, we define robustness measures for STL* by adapting the robustness measures previously introduced for Metric Temporal Logic (MTL). Furthermore, we present an algorithm for STL* robustness computation, which is implemented in the tool Parasim. Application of STL* robustness analysis is demonstrated on case studies.
@article{arxiv.1309.0867,
title = {Robustness Analysis for Value-Freezing Signal Temporal Logic},
author = {L. Brim and T. Vejpustek and D. Šafránek and J. Fabriková},
journal= {arXiv preprint arXiv:1309.0867},
year = {2013}
}