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RL4ReAl: Reinforcement Learning for Register Allocation

Machine Learning 2023-02-07 v3 Hardware Architecture Programming Languages

Abstract

We aim to automate decades of research and experience in register allocation, leveraging machine learning. We tackle this problem by embedding a multi-agent reinforcement learning algorithm within LLVM, training it with the state of the art techniques. We formalize the constraints that precisely define the problem for a given instruction-set architecture, while ensuring that the generated code preserves semantic correctness. We also develop a gRPC based framework providing a modular and efficient compiler interface for training and inference. Our approach is architecture independent: we show experimental results targeting Intel x86 and ARM AArch64. Our results match or out-perform the heavily tuned, production-grade register allocators of LLVM.

Keywords

Cite

@article{arxiv.2204.02013,
  title  = {RL4ReAl: Reinforcement Learning for Register Allocation},
  author = {S. VenkataKeerthy and Siddharth Jain and Anilava Kundu and Rohit Aggarwal and Albert Cohen and Ramakrishna Upadrasta},
  journal= {arXiv preprint arXiv:2204.02013},
  year   = {2023}
}

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Published in CC'23

R2 v1 2026-06-24T10:38:05.031Z