Rigorous estimation of error thresholds of transversal Clifford logical circuits

The threshold theorem promises a path to fault-tolerant quantum computation, provided the physical error rate is below a critical threshold. While transversal gates efficiently implement logical operations, they propagate errors and can lower this threshold relative to a static quantum memory. In this work, we generalize the statistical-mechanical (stat-mech) mapping from quantum memories to logical circuits with transversal gates, thereby enabling rigorous, decoder-independent thresholds for fault-tolerant logical computation. We first demonstrate the framework for two toric code blocks undergoing a transversal CNOT (tCNOT) gate, quantifying two independent error-spreading mechanisms. For persistent bit-flip errors with perfect syndromes, the stat-mech model is a 2D random Ashkin-Teller model. Monte Carlo simulation and finite-size scaling show that the tCNOT reduces the optimal bit-flip threshold to $p=0.080$, a $26\%$ decrease from the toric code memory threshold $p=0.109$. With syndrome errors included, the circuit maps to a 3D random 4-body Ising model with a plane defect, yielding a conservative estimate $p\geq 0.028$, a modest $15\%$ reduction from the memory threshold $p=0.033$. Beyond the tCNOT gate, we derive stat-mech models for all transversal Clifford gates of the toric code, including the fold-transversal Hadamard and $S$ gates, and generalize the framework to arbitrary CSS codes, proving that each transversal gate modifies the stat-mech model only locally in time. By reducing threshold analysis of fault-tolerant logical circuits to the study of classical spin models with local defects, our framework provides a systematic, decoder-independent benchmark for near-term fault-tolerant architectures.