English

Radiation Tolerance of 65nm CMOS Transistors

Instrumentation and Detectors 2016-01-20 v4 High Energy Physics - Experiment

Abstract

We report on the effects of ionizing radiation on 65nm CMOS transistors held at approximately -20C during irradiation. The pattern of damage observed after a total dose of 1 Grad is similar to damage reported in room temperature exposures, but we observe less damage than was observed at room temperature.

Keywords

Cite

@article{arxiv.1501.05966,
  title  = {Radiation Tolerance of 65nm CMOS Transistors},
  author = {M. Krohn and B. Bentele and J. P. Cumalat and S. R. Wagner and D. C. Christian and G. Deptuch and F. Fahim and J. Hoff and A. Shenai},
  journal= {arXiv preprint arXiv:1501.05966},
  year   = {2016}
}