The controlled depletion of electrons in semiconductors is the basis for numerous devices. Reactive-ion etching provides an effective technique for fabricating both classical and quantum devices. However, Fermi level pinning can occur, and must be carefully considered in the development of small devices, such as quantum dots. Because of depletion, the electrical size of the device is reduced in comparison with its physical dimension. To investigate this issue, we fabricate several types of devices in silicon-germanium heterostructures using two different etches, CF4 and SF6. We estimate the depletion width associated with each etch by two methods: (i) conductance measurements in etched wires of decreasing thickness (to determine the onset of depletion), (ii) capacitance measurements of quantum dots (to estimate the size of the active region). We find that the SF6 etch causes a much smaller depletion width, making it more suitable for device fabrication.
@article{arxiv.cond-mat/0503766,
title = {Quantum Dots and Etch-Induced Depletion of a Silicon 2DEG},
author = {L. J. Klein and K. L. M. Lewis and K. A. Slinker and Srijit Goswami and D. W. van der Weide and R. H. Blick and P. M. Mooney and J. O. Chu and S. N. Coppersmith and Mark Friesen and Mark A. Eriksson},
journal= {arXiv preprint arXiv:cond-mat/0503766},
year = {2015}
}