English

Open the box of digital neuromorphic processor: Towards effective algorithm-hardware co-design

Neural and Evolutionary Computing 2023-03-28 v1 Systems and Control Systems and Control

Abstract

Sparse and event-driven spiking neural network (SNN) algorithms are the ideal candidate solution for energy-efficient edge computing. Yet, with the growing complexity of SNN algorithms, it isn't easy to properly benchmark and optimize their computational cost without hardware in the loop. Although digital neuromorphic processors have been widely adopted to benchmark SNN algorithms, their black-box nature is problematic for algorithm-hardware co-optimization. In this work, we open the black box of the digital neuromorphic processor for algorithm designers by presenting the neuron processing instruction set and detailed energy consumption of the SENeCA neuromorphic architecture. For convenient benchmarking and optimization, we provide the energy cost of the essential neuromorphic components in SENeCA, including neuron models and learning rules. Moreover, we exploit the SENeCA's hierarchical memory and exhibit an advantage over existing neuromorphic processors. We show the energy efficiency of SNN algorithms for video processing and online learning, and demonstrate the potential of our work for optimizing algorithm designs. Overall, we present a practical approach to enable algorithm designers to accurately benchmark SNN algorithms and pave the way towards effective algorithm-hardware co-design.

Keywords

Cite

@article{arxiv.2303.15224,
  title  = {Open the box of digital neuromorphic processor: Towards effective algorithm-hardware co-design},
  author = {Guangzhi Tang and Ali Safa and Kevin Shidqi and Paul Detterer and Stefano Traferro and Mario Konijnenburg and Manolis Sifalakis and Gert-Jan van Schaik and Amirreza Yousefzadeh},
  journal= {arXiv preprint arXiv:2303.15224},
  year   = {2023}
}
R2 v1 2026-06-28T09:35:38.786Z