Non-Invasive Reverse Engineering of Finite State Machines Using Power Analysis and Boolean Satisfiability
Abstract
In this paper, we present a non-invasive reverse engineering attack based on a novel approach that combines functional and power analysis to recover finite state machines from their synchronous sequential circuit implementations. The proposed technique formulates the machine exploration and state identification problem as a Boolean constraint satisfaction problem and solves it using a SMT (Satisfiability Modulo Theories) solver. It uses power measurements to achieve fast convergence. Experimental results using the LGSynth'91 benchmark suite show that the satisfiability-based approach is several times faster compared to existing techniques and can successfully recover 90%-100% of the transitions of a target machine.
Cite
@article{arxiv.1908.01979,
title = {Non-Invasive Reverse Engineering of Finite State Machines Using Power Analysis and Boolean Satisfiability},
author = {Harsh Vamja and Richa Agrawal and Ranga Vemuri},
journal= {arXiv preprint arXiv:1908.01979},
year = {2019}
}
Comments
Black-box Analysis, Finite State Machines, Power Analysis, Reverse Engineering, Satisfiability Checking, Proceedings of the 2019 IEEE International Midwest Symposium on Circuits and Systems