English

Lupulus: A Flexible Hardware Accelerator for Neural Networks

Signal Processing 2020-05-05 v1 Hardware Architecture Computer Vision and Pattern Recognition

Abstract

Neural networks have become indispensable for a wide range of applications, but they suffer from high computational- and memory-requirements, requiring optimizations from the algorithmic description of the network to the hardware implementation. Moreover, the high rate of innovation in machine learning makes it important that hardware implementations provide a high level of programmability to support current and future requirements of neural networks. In this work, we present a flexible hardware accelerator for neural networks, called Lupulus, supporting various methods for scheduling and mapping of operations onto the accelerator. Lupulus was implemented in a 28nm FD-SOI technology and demonstrates a peak performance of 380 GOPS/GHz with latencies of 21.4ms and 183.6ms for the convolutional layers of AlexNet and VGG-16, respectively.

Keywords

Cite

@article{arxiv.2005.01016,
  title  = {Lupulus: A Flexible Hardware Accelerator for Neural Networks},
  author = {Andreas Toftegaard Kristensen and Robert Giterman and Alexios Balatsoukas-Stimming and Andreas Burg},
  journal= {arXiv preprint arXiv:2005.01016},
  year   = {2020}
}

Comments

To be presented at the 2020 International Conference on Acoustics, Speech, and Signal Processing

R2 v1 2026-06-23T15:16:13.048Z