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Lowering the T-depth of Quantum Circuits By Reducing the Multiplicative Depth Of Logic Networks

Quantum Physics 2020-06-09 v1 Cryptography and Security Emerging Technologies

Abstract

The multiplicative depth of a logic network over the gate basis {,,¬}\{\land, \oplus, \neg\} is the largest number of \land gates on any path from a primary input to a primary output in the network. We describe a dynamic programming based logic synthesis algorithm to reduce the multiplicative depth in logic networks. It makes use of cut enumeration, tree balancing, and exclusive sum-of-products (ESOP) representations. Our algorithm has applications to cryptography and quantum computing, as a reduction in the multiplicative depth directly translates to a lower TT-depth of the corresponding quantum circuit. Our experimental results show improvements in TT-depth over state-of-the-art methods and over several hand-optimized quantum circuits for instances of AES, SHA, and floating-point arithmetic.

Keywords

Cite

@article{arxiv.2006.03845,
  title  = {Lowering the T-depth of Quantum Circuits By Reducing the Multiplicative Depth Of Logic Networks},
  author = {Thomas Häner and Mathias Soeken},
  journal= {arXiv preprint arXiv:2006.03845},
  year   = {2020}
}

Comments

8 pages, 3 figures