Logic Column 12: Logical Verification and Equational Verification
Logic in Computer Science
2007-05-23 v1
Abstract
This article examines two approaches to verification, one based on using a logic for expressing properties of a system, and one based on showing the system equivalent to a simpler system that obviously has whatever property is of interest. Using examples such as process calculi and regular programs, the relationship between these two approaches is explored.
Cite
@article{arxiv.cs/0505024,
title = {Logic Column 12: Logical Verification and Equational Verification},
author = {Riccardo Pucella},
journal= {arXiv preprint arXiv:cs/0505024},
year = {2007}
}
Comments
11 pages