Intrinsic Sequentiality in P: Causal Limits of Parallel Computation
Abstract
We study a polynomial-time decision problem in which each input encodes a depth- causal execution in which a single non-duplicable token must traverse an ordered sequence of steps, revealing at most bits of routing information at each step. The uncertainty in the problem lies in identifying the delivery path through the relay network rather than in the final accept/reject outcome, which is defined solely by completion of the prescribed execution. A deterministic Turing machine executes the process in time. Using information-theoretic tools - specifically cut-set bounds for relay channels and Fano's inequality - we prove that any execution respecting the causal constraints requires units of causal time, thereby ruling out asymptotic parallel speedup. We further show that no classical circuit family can implement the process when circuit depth is interpreted as realizable parallel time. This identifies a class of polynomial-time problems with intrinsic causal structure and highlights a gap between logical parallelism and causal executability.
Keywords
Cite
@article{arxiv.2603.08471,
title = {Intrinsic Sequentiality in P: Causal Limits of Parallel Computation},
author = {Jing-Yuan Wei},
journal= {arXiv preprint arXiv:2603.08471},
year = {2026}
}
Comments
We introduce the Hierarchical Temporal Relay (HTR) model, capturing computations whose semantics require hop-by-hop causal execution. Using information-theoretic tools, we prove that any implementation respecting causal communication constraints requires {\Omega}(N) time, showing that such processes cannot be compressed into polylogarithmic-depth parallel computation