Inter-branch message transfer on superconducting quantum processors: a multi-architecture benchmark
Abstract
We treat inter-branch message transfer in a Wigner's-friend circuit as a practical benchmark for near-term superconducting quantum processors. Implementing Violaris' unitary message-transfer primitive, we compare performance across IBM Eagle, Nighthawk, and Heron (r2/r3) processors for message sizes up to , without error mitigation. We study three message families -- sparse (one-hot), half-weight, and dense -- and measure conditional string success , memory erasure after uncomputation, and correlation diagnostics (branch contrast and bitwise mutual information). The sparse family compiles to essentially constant two-qubit depth, yielding a depth-controlled probe of device noise: at we observe spanning to across backends. In contrast, half and dense messages incur rapidly growing routing overhead, and transpiler-seed variability becomes a practical limitation near the coherence frontier. We further report an amplitude sweep (no-amplification test) and a divergence ``cousins'' sweep that quantifies degradation with branch-conditioned complexity. All data and figure-generation scripts are released.
Cite
@article{arxiv.2601.19762,
title = {Inter-branch message transfer on superconducting quantum processors: a multi-architecture benchmark},
author = {Cameron V. Cogburn},
journal= {arXiv preprint arXiv:2601.19762},
year = {2026}
}
Comments
5 pages, 9 figures. Source includes reproducibility bundle (data, scripts, job IDs, calibration snapshots)