English

Information Flow Coverage Metrics for Hardware Security Verification

Cryptography and Security 2023-04-18 v1 Hardware Architecture

Abstract

Security graphs model attacks, defenses, mitigations, and vulnerabilities on computer networks and systems. With proper attributes, they provide security metrics using standard graph algorithms. A hyperflow graph is a register-transfer level (RTL) hardware security graph that facilitates security verification. A hyperflow graph models information flows and is annotated with attributes that allow security metrics to measure flow paths, flow conditions, and flow rates. Hyperflow graphs enable the understanding of hardware vulnerabilities related to confidentiality, integrity, and availability, as shown on the OpenTitan hardware root of trust under several threat models.

Keywords

Cite

@article{arxiv.2304.08263,
  title  = {Information Flow Coverage Metrics for Hardware Security Verification},
  author = {Andres Meza and Ryan Kastner},
  journal= {arXiv preprint arXiv:2304.08263},
  year   = {2023}
}

Comments

6 pages, 3 Figures

R2 v1 2026-06-28T10:08:19.962Z