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In-memory Realization of In-situ Few-shot Continual Learning with a Dynamically Evolving Explicit Memory

Machine Learning 2022-07-15 v1

Abstract

Continually learning new classes from a few training examples without forgetting previous old classes demands a flexible architecture with an inevitably growing portion of storage, in which new examples and classes can be incrementally stored and efficiently retrieved. One viable architectural solution is to tightly couple a stationary deep neural network to a dynamically evolving explicit memory (EM). As the centerpiece of this architecture, we propose an EM unit that leverages energy-efficient in-memory compute (IMC) cores during the course of continual learning operations. We demonstrate for the first time how the EM unit can physically superpose multiple training examples, expand to accommodate unseen classes, and perform similarity search during inference, using operations on an IMC core based on phase-change memory (PCM). Specifically, the physical superposition of a few encoded training examples is realized via in-situ progressive crystallization of PCM devices. The classification accuracy achieved on the IMC core remains within a range of 1.28%--2.5% compared to that of the state-of-the-art full-precision baseline software model on both the CIFAR-100 and miniImageNet datasets when continually learning 40 novel classes (from only five examples per class) on top of 60 old classes.

Keywords

Cite

@article{arxiv.2207.06810,
  title  = {In-memory Realization of In-situ Few-shot Continual Learning with a Dynamically Evolving Explicit Memory},
  author = {Geethan Karunaratne and Michael Hersche and Jovin Langenegger and Giovanni Cherubini and Manuel Le Gallo-Bourdeau and Urs Egger and Kevin Brew and Sam Choi and INJO OK and Mary Claire Silvestre and Ning Li and Nicole Saulnier and Victor Chan and Ishtiaq Ahsan and Vijay Narayanan and Luca Benini and Abu Sebastian and Abbas Rahimi},
  journal= {arXiv preprint arXiv:2207.06810},
  year   = {2022}
}

Comments

Accepted at the European Solid-state Devices and Circuits Conference (ESSDERC), September 2022

R2 v1 2026-06-25T00:54:40.280Z