English

HieraSparse: Hierarchical Semi-Structured Sparse KV Attention

Distributed, Parallel, and Cluster Computing 2026-04-21 v1 Hardware Architecture

Abstract

The deployment of long-context Large Language Models (LLMs) poses significant challenges due to the intense computational cost of self-attention and the substantial memory overhead of the Key-Value Cache (KV Cache). In this paper, we introduce HieraSparse, a hierarchical KV Cache compression framework with acceleration kernels that leverage GPU sparse tensor cores to speed up semi-structured KV Cache attention for both the prefill and decode phases. With the hierarchical design, our method allows for a flexible quality-sparsity trade-off and successfully converts sparsity into efficiency. Compared to the state-of-the-art decode method that utilizes unstructured sparsity, HieraSparse achieves 1.2×\mathbf{1.2\times} KV compression ratio and 4.57×\mathbf{4.57\times} attention speedup at the same sparsity level. Furthermore, we extended the semi-structured KV Cache pruning to the prefill stage, which demonstrated up to 1.85×\mathbf{1.85\times} attention speedup at the highest sparsity. Lastly, we evaluate the generation quality of HieraSparse with a simple magnitude-based pruning method, and the results show that 1.37×\mathbf{1.37\times} prefill speedup and 1.77×\mathbf{1.77\times} decode speedup can be achieved without significant quality drop. The codebase can be found at https://github.com/psl-ntu/HieraSparse.

Keywords

Cite

@article{arxiv.2604.16864,
  title  = {HieraSparse: Hierarchical Semi-Structured Sparse KV Attention},
  author = {Haoxuan Wang and Chen Wang},
  journal= {arXiv preprint arXiv:2604.16864},
  year   = {2026}
}
R2 v1 2026-07-01T12:15:47.957Z