Hardware Decoders for Polar Codes: An Overview
Information Theory
2016-08-29 v1 math.IT
Abstract
Polar codes are an exciting new class of error correcting codes that achieve the symmetric capacity of memoryless channels. Many decoding algorithms were developed and implemented, addressing various application requirements: from error-correction performance rivaling that of LDPC codes to very high throughput or low-complexity decoders. In this work, we review the state of the art in polar decoders implementing the successive-cancellation, belief propagation, and list decoding algorithms, illustrating their advantages.
Cite
@article{arxiv.1606.00737,
title = {Hardware Decoders for Polar Codes: An Overview},
author = {Pascal Giard and Gabi Sarkis and Alexios Balatsoukas-Stimming and YouZhe Fan and Chi-ying Tsui and Andreas Burg and Claude Thibeault and Warren J. Gross},
journal= {arXiv preprint arXiv:1606.00737},
year = {2016}
}
Comments
4 pages, 3 figures, presented at IEEE ISCAS 2016