English

Hardware-based stack buffer overflow attack detection on RISC-V architectures

Cryptography and Security 2024-06-18 v1

Abstract

This work evaluates how well hardware-based approaches detect stack buffer overflow (SBO) attacks in RISC-V systems. We conducted simulations on the PULP platform and examined micro-architecture events using semi-supervised anomaly detection techniques. The findings showed the challenge of detection performance. Thus, a potential solution combines software and hardware-based detectors concurrently, with hardware as the primary defense. The hardware-based approaches present compelling benefits that could enhance RISC-V-based architectures.

Keywords

Cite

@article{arxiv.2406.10282,
  title  = {Hardware-based stack buffer overflow attack detection on RISC-V architectures},
  author = {Cristiano Pegoraro Chenet and Ziteng Zhang and Alessandro Savino and Stefano Di Carlo},
  journal= {arXiv preprint arXiv:2406.10282},
  year   = {2024}
}

Comments

2 pages, 2 figures

R2 v1 2026-06-28T17:06:36.826Z