English

Further Evaluations of a Didactic CPU Visual Simulator (CPUVSIM)

Hardware Architecture 2024-11-11 v1

Abstract

This paper discusses further evaluations of the educational effectiveness of an existing CPU visual simulator (CPUVSIM). The CPUVSIM, as an Open Educational Resource, has been iteratively improved over a number of years following an Open Pedagogy approach, and was designed to enhance novices understanding of computer operation and mapping from high-level code to assembly language. The literature reports previous evaluations of the simulator, at K12 and undergraduate level, conducted from the perspectives of both developers and students, albeit with a limited sample size and primarily through qualitative methods. This paper describes additional evaluation activities designed to provide a more comprehensive assessment, across diverse educational settings: an action research pilot study recently carried out in Singapore and the planning of a more quantitative-oriented study in Dubai, with a larger sample size. Results from the pilot study in Singapore confirm the effectiveness and high level of appreciation of the tool, alongside a few identified challenges, which inform the planning of the more comprehensive evaluation in Dubai.

Keywords

Cite

@article{arxiv.2411.05229,
  title  = {Further Evaluations of a Didactic CPU Visual Simulator (CPUVSIM)},
  author = {Renato Cortinovis and Tamer Mohamed Abdellatif and Devender Goyal and Luiz Fernando Capretz},
  journal= {arXiv preprint arXiv:2411.05229},
  year   = {2024}
}

Comments

8 pages

R2 v1 2026-06-28T19:52:28.278Z