English

FPGA & VPU Co-Processing in Space Applications: Development and Testing with DSP/AI Benchmarks

Hardware Architecture 2025-06-17 v1

Abstract

The advent of computationally demanding algorithms and high data rate instruments in new space applications pushes the space industry to explore disruptive solutions for on-board data processing. We examine heterogeneous computing architectures involving high-performance and low-power commercial SoCs. The current paper implements an FPGA with VPU co-processing architecture utilizing the CIF & LCD interfaces for I/O data transfers. A Kintex FPGA serves as our framing processor and heritage accelerator, while we offload novel DSP/AI functions to a Myriad2 VPU. We prototype our architecture in the lab to evaluate the interfaces, the FPGA resource utilization, the VPU computational throughput, as well as the entire data handling system's performance, via custom benchmarking.

Keywords

Cite

@article{arxiv.2506.12968,
  title  = {FPGA & VPU Co-Processing in Space Applications: Development and Testing with DSP/AI Benchmarks},
  author = {Vasileios Leon and Charalampos Bezaitis and George Lentaris and Dimitrios Soudris and Dionysios Reisis and Elissaios-Alexios Papatheofanous and Angelos Kyriakos and Aubrey Dunne and Arne Samuelsson and David Steenari},
  journal= {arXiv preprint arXiv:2506.12968},
  year   = {2025}
}

Comments

Presented at the 28th IEEE ICECS Conference

R2 v1 2026-07-01T03:18:41.105Z