ETH-Hardness of Learning Monotone Circuits and Approximating Their Size
Abstract
We show the following hardness results for monotone learning and approximation of monotone circuit size: 1. Under the Randomised Exponential-Time Hypothesis (rETH), it requires time to PAC-learn monotone formulas with input bits and size by monotone circuits of size , for every . 2. Under the Randomised Exponential-Time Hypothesis (rETH), for any , there is a polynomially bounded function such that -multiplicatively approximating the minimum monotone circuit size of a monotone function consistent with a sequence of labelled examples over -bit inputs requires time . Our results are shown by a novel application of lifting arguments in proof and communication complexity to hardness of monotone learning, by building on the seminal result of Atserias and M\"uller (J. ACM, 2020) on hardness of automating Resolution proofs.
Keywords
Cite
@article{arxiv.2607.12331,
title = {ETH-Hardness of Learning Monotone Circuits and Approximating Their Size},
author = {Bruno Cavalar and Susanna F. de Rezende and Matthew Gray and Rahul Santhanam},
journal= {arXiv preprint arXiv:2607.12331},
year = {2026}
}