Energy-efficient 8-point DCT Approximations: Theory and Hardware Architectures
Abstract
Due to its remarkable energy compaction properties, the discrete cosine transform (DCT) is employed in a multitude of compression standards, such as JPEG and H.265/HEVC. Several low-complexity integer approximations for the DCT have been proposed for both 1-D and 2-D signal analysis. The increasing demand for low-complexity, energy efficient methods require algorithms with even lower computational costs. In this paper, new 8-point DCT approximations with very low arithmetic complexity are presented. The new transforms are proposed based on pruning state-of-the-art DCT approximations. The proposed algorithms were assessed in terms of arithmetic complexity, energy retention capability, and image compression performance. In addition, a metric combining performance and computational complexity measures was proposed. Results showed good performance and extremely low computational complexity. Introduced algorithms were mapped into systolic-array digital architectures and physically realized as digital prototype circuits using FPGA technology and mapped to 45nm CMOS technology. All hardware-related metrics showed low resource consumption of the proposed pruned approximate transforms. The best proposed transform according to the introduced metric presents a reduction in power consumption of 21--25%.
Cite
@article{arxiv.1612.00807,
title = {Energy-efficient 8-point DCT Approximations: Theory and Hardware Architectures},
author = {R. J. Cintra and F. M. Bayer and V. A. Coutinho and S. Kulasekera and A. Madanayake},
journal= {arXiv preprint arXiv:1612.00807},
year = {2016}
}
Comments
21 pages, 7 figures, 5 tables