We implement two novel algorithms for sparse-matrix dense-matrix multiplication (SpMM) on the GPU. Our algorithms expect the sparse input in the popular compressed-sparse-row (CSR) format and thus do not require expensive format conversion. While previous SpMM work concentrates on thread-level parallelism, we additionally focus on latency hiding with instruction-level parallelism and load-balancing. We show, both theoretically and experimentally, that the proposed SpMM is a better fit for the GPU than previous approaches. We identify a key memory access pattern that allows efficient access into both input and output matrices that is crucial to getting excellent performance on SpMM. By combining these two ingredients---(i) merge-based load-balancing and (ii) row-major coalesced memory access---we demonstrate a 4.1x peak speedup and a 31.7% geomean speedup over state-of-the-art SpMM implementations on real-world datasets.
@article{arxiv.1803.08601,
title = {Design Principles for Sparse Matrix Multiplication on the GPU},
author = {Carl Yang and Aydin Buluc and John D. Owens},
journal= {arXiv preprint arXiv:1803.08601},
year = {2018}
}
Comments
16 pages, 7 figures, International European Conference on Parallel and Distributed Computing (Euro-Par) 2018