English

Design of a Virtual Component Neutral Network-on-Chip Transaction Layer

Hardware Architecture 2011-11-09 v1

Abstract

Research studies have demonstrated the feasibility and advantages of Network-on-Chip (NoC) over traditional bus-based architectures but have not focused on compatibility communication standards. This paper describes a number of issues faced when designing a VC-neutral NoC, i.e. compatible with standards such as AHB 2.0, AXI, VCI, OCP, and various other proprietary protocols, and how a layered approach to communication helps solve these issues.

Keywords

Cite

@article{arxiv.0710.4754,
  title  = {Design of a Virtual Component Neutral Network-on-Chip Transaction Layer},
  author = {Philippe Martin},
  journal= {arXiv preprint arXiv:0710.4754},
  year   = {2011}
}

Comments

Submitted on behalf of EDAA (http://www.edaa.com/)

R2 v1 2026-06-21T09:36:09.585Z