English

DecodeX: Exploring and Benchmarking of LDPC Decoding across CPU, GPU, and ASIC Platforms

Networking and Internet Architecture 2025-11-06 v1

Abstract

Emerging virtualized radio access networks (vRANs) demand flexible and efficient baseband processing across heterogeneous compute substrates. In this paper, we present DecodeX, a unified benchmarking framework for evaluating low-density parity-check (LDPC) decoding acceleration across different hardware platforms. DecodeX integrates a comprehensive suite of LDPC decoder implementations, including kernels, APIs, and test vectors for CPUs (FlexRAN), GPUs (Aerial and Sionna-RK), and ASIC (ACC100), and can be readily extended to additional architectures and configurations. Using DecodeX, we systematically characterize how different platforms orchestrate computation-from threading and memory management to data movement and accelerator offload-and quantify the resulting decoding latency under varying Physical layer parameters. Our observations reveal distinct trade-offs in parallel efficiency and offload overhead, showing that accelerator gains strongly depend on data-movement and workload granularity. Building on these insights, we discuss how cross-platform benchmarking can inform adaptive scheduling and co-design for future heterogeneous vRANs, enabling scalable and energy-efficient baseband processing for NextG wireless systems.

Keywords

Cite

@article{arxiv.2511.02952,
  title  = {DecodeX: Exploring and Benchmarking of LDPC Decoding across CPU, GPU, and ASIC Platforms},
  author = {Zhenzhou Qi and Yuncheng Yao and Yiming Li and Chung-Hsuan Tung and Junyao Zheng and Danyang Zhuo and Tingjun Chen},
  journal= {arXiv preprint arXiv:2511.02952},
  year   = {2025}
}
R2 v1 2026-07-01T07:21:56.812Z